Patents by Inventor Joerg W. Wohlfahrt

Joerg W. Wohlfahrt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Redundancy in series grouped memory architecture
    Patent number: 6856560
    Abstract: An improved redundancy scheme for chained memory architecture is disclosed. The redundancy scheme comprises including redundant cells as part of the memory chain. As such, a redundant cell is used to repair a defective cell within the chain. This eliminates the need in conventional chained architecture to replace the whole memory block when there is a defective cell.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: February 15, 2005
    Assignee: Infineon Technologies Aktiengesellschaft
    Inventors: Norbert Rehm, Hans-Oliver Joachim, Thomas Roehr, Joerg W. Wohlfahrt
  • Redundancy in chained memory architectures
    Publication number: 20030202386
    Abstract: An improved redundancy scheme for chained memory architecture is disclosed. The redundancy scheme comprises including redundant cells as part of the memory chain. As such, a redundant cell is used to repair a defective cell within the chain. This eliminates the need in conventional chained architecture to replace the whole memory block when there is a defective cell.
    Type: Application
    Filed: April 26, 2002
    Publication date: October 30, 2003
    Inventors: Norbert Rehm, Hans-Oliver Joachim, Thomas Roehr, Joerg W. Wohlfahrt