Abstract: Embodiments of the present invention provide an automatic test equipment. The automatic test equipment is configured to receive an input signal from a device under test and to write an information describing the input signal to a memory. The automatic test equipment is further configured to read the information describing the input signal from the memory and to provide an output signal for the device under test based on the information describing the input signal read from the memory.

Abstract: There is provided a method that includes (a) sampling a data signal and a clock signal by applying strobes for obtaining a corresponding bit values each for the data signal and for the clock signal, each of the strobes having a different phase offset with respect to a tester clock signal, (b) deriving first comparison results for the bit values of the data signal by comparing the bit values of the data signal each with an expected data bit value of expected data, (c) deriving second comparison results for the bit values of the clock signal by comparing the bit values of the clock signal each with an expected clock bit value, (d) deriving for the strobes combined comparison results by applying logical operations each on pairs of corresponding first and second comparison results, and (e) deriving a test result based on the combined comparison results.

Abstract: A method of testing a device under test, which is adapted to transmit a digital data signal and a clock signal, the data signal being related to the clock signal, comprising the steps of: sampling within one tester clock cycle of the test device the data signal and the clock signal by applying a number of strobes for obtaining a corresponding number of bit values each for the data signal and for the clock signal, each of the strobes having a different phase offset with respect to a tester clock signal of the test device, deriving first comparison results for the sampled bit values of the data signal by comparing the sampled bit values of the data signal each with an expected data bit value according to expected data, deriving second comparison results for the sampled bit values of the clock signal by comparing the sampled bit values of the clock signal each with an expected clock bit value, deriving for the strobes combined comparison results by applying logical operations each on pairs of corresponding first

Abstract: A testing unit (10) for testing a device under test—DUT—(30) comprises a signal generator (20) for applying a stimulus signal to the DUT (30), a receiving unit (50) for receiving a response signal from the DUT on the applied stimulus signal, and a synchronizing unit (40) for synchronizing a data flow of the response signal between the DUT (30) and the receiving unit (50). The synchronizing unit (40) receives a first clock signal (DUT-CLK) from the DUT (30) and a second clock signal (CLK) of the testing unit (10). The synchronizing unit (40) comprises a buffer (70) for buffering data, a write unit (80) for writing data from the DUT (30) into the buffer (70), and a read unit (90) for reading out data from the buffer (70) to be provided to the receiving unit (50). A write access onto the buffer (70) is controlled by the first clock signal (DUT-CLK), while a read access onto the buffer (70) is controlled by the second clock signal (CLK).