Patents by Inventor Joevanni Parairo

Joevanni Parairo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FPGA functionality mode switch-over
    Patent number: 10627798
    Abstract: In an embodiment of the invention, an apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; a field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA; wherein the apparatus triggers a switch of an FPGA image in the FPGA to another FPGA image. In another embodiment of the invention, a method comprises: triggering, by an apparatus, a switch of an FPGA image in a field programmable gate array (FPGA) to another FPGA image; herein the apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; the field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: April 21, 2020
    Assignee: BiTMICRO Networks, Inc.
    Inventors: Federico Sambilay, Jr., Bharadwaj Pudipeddi, Richard A. Cantong, Joevanni Parairo
  • Data Software System Assist
    Publication number: 20190155735
    Abstract: In an embodiment of the invention, an apparatus comprises: a central processing unit (CPU); a volatile memory controller; a non-volatile memory controller; a volatile memory coupled to the volatile memory controller; and a non-volatile memory coupled to the non-volatile memory controller; wherein a ratio of the non-volatile memory to the volatile memory is much less than a typical ratio. In another embodiment of the invention, a method comprises: receiving, by a Central Processing Unit (CPU) receives a command; evaluating, by the CPU, the command; executing, by the CPU, a data software assist to perform the command or activating, by the CPU, a hardware accelerator module to perform the command; and responding, by the CPU, to the command.
    Type: Application
    Filed: June 29, 2018
    Publication date: May 23, 2019
    Inventors: Bharadwaj Pudipeddi, Richard A. Cantong, Marlon B. Verdan, Joevanni Parairo, Marvin Fenol
  • FPGA Functionality Mode Switch-Over
    Publication number: 20190018386
    Abstract: In an embodiment of the invention, an apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; a field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA; wherein the apparatus triggers a switch of an FPGA image in the FPGA to another FPGA image. In another embodiment of the invention, a method comprises: triggering, by an apparatus, a switch of an FPGA image in a field programmable gate array (FPGA) to another FPGA image; herein the apparatus comprises: a non-volatile memory device; a complex programmable logic device (CPLD) coupled to the non-volatile memory device; the field programmable gate array (FPGA) coupled to the CPLD; and a host coupled to the FPGA.
    Type: Application
    Filed: June 29, 2018
    Publication date: January 17, 2019
    Inventors: Federico Sambilay Jr., Bharadwaj Pudipeddi, Richard A. Cantong, Joevanni Parairo