Patents by Inventor Joey Doernberg

Joey Doernberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050168270
    Abstract: A bandgap reference circuit can use various output stages to implement a controlled feedback method of sensing and supplying the needed load current through a sensing network. A small amount of circuitry can be added to a class AB output stage to decouple the bandgap reference feedback from a capacitive load and simultaneously sense load current needs and boost current as needed while minimizing voltage droop. Such circuits can be implemented using relatively compact designs while still reducing droop, and thus allowing the use of a large external capacitor to reduce noise and maintain good power supply rejection.
    Type: Application
    Filed: January 30, 2004
    Publication date: August 4, 2005
    Inventors: Robert Bartel, Joey Doernberg, Edward Miller
  • Patent number: 6717451
    Abstract: The inventive level shifting circuit shifts an analog input signal by a precise amount. This allows it to be used in precision instrumentation applications where precise signal shifts are critical. It uses a self-biasing feedback circuit to determine the bias current needed to shift an analog signal by a desired amount. The circuit automatically compensates for influences by temperature, supply voltage, and process variations. This circuit also has value as a stand-alone function for other (non-programmable) products.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: April 6, 2004
    Assignee: Lattice Semiconductor Corporation
    Inventors: Hans W. Klein, Paul Hildebrant, Joey Doernberg, Jian Li
  • Patent number: 5769384
    Abstract: Circuitry and circuitry layout are provided to achieve a high percentage of photoreceiver area to total area and to stabilize the voltage at the base node of a phototransistor. Voltage stabilization is achieved by a servo circuit in which a negative feedback loop from the base node to an emitter node maintains a bias point, so that photocurrent is efficiently delivered to charge transfer circuitry. In the preferred embodiment, the base node is connected to a gate of a first transistor having a drain that is connected to a source of constant current and to a gate of a second transistor that functions as a source follower. The source of the second transistor is connected to the emitter node of a phototransistor. As photocurrent is generated by the reception of light, an integration capacitor is charged.
    Type: Grant
    Filed: January 25, 1996
    Date of Patent: June 23, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Richard A. Baumgartner, Travis N. Blalock, Thomas Hornak, Joey Doernberg
  • Patent number: 4742330
    Abstract: A flash ADC utilizes parallel weighted capacitive arrays and a resistor string to provide reference voltage intervals and an encoder for indicating the reference voltage interval wherein an input voltage lies. For an embodiment having N branches, the reference voltage intervals are subdivided into N sub-intervals and each succeeding clock cycle.
    Type: Grant
    Filed: May 1, 1987
    Date of Patent: May 3, 1988
    Assignee: The Regents of the University of California
    Inventors: Joey Doernberg, Paul R. Gray, David A. Hodges