Abstract: A low jitter method for extracting clock or data from a serial digital bitstream generates from a digital decoder a window signal from the serial digital bitstream by sampling the serial digital bitstream with a sample clock signal. The window signal envelops a specified transition of the serial digital bitstream, and is used as a gate input to an AND circuit to extract the clock signal or desired data from the bitstream without introducing jitter. The clock signal may then be used to clock out data previously extracted by the digital decoder.

Abstract: A system and method for synchronous switching of digital audio data channels while maintaining block alignment between the switched digital audio signals at an output separates status and user bits from audio data and validity bits for each digital audio signal, storing the status and user bits in respective memories for each digital audio data channel. The audio data and validity bits for each digital audio data channel are input via a data first-in, first-out buffer to an audio multiplexer. The status and user bits from the memories for each digital audio data channel are read out by a system clock in synchronization with a system block signal and input to a status/user multiplexer. A selector provides control signals to the multiplexers to select the digital audio data channel to provide to an output transmitter.