Patents by Inventor Joey R. Haddock

Joey R. Haddock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8896346
    Abstract: A self-modifying FPGA system includes an FPGA and a configuration memory coupled to the FPGA for providing the FPGA with configuration data including SAFE configuration data and dormant configuration data. The SAFE configuration data is initially loaded to the FPGA and the FPGA is configured to a safe operating mode. Upon a determination to proceed to a next step of self modification, dormant configuration data contained in the configuration memory is loaded into the FPGA and the FPGA is configured to a secure operating mode.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: November 25, 2014
    Assignee: Lewis Innovative Technologies
    Inventors: James M. Lewis, Joey R. Haddock, Dane R. Walther
  • Patent number: 8159259
    Abstract: A self-modifying FPGA system includes an FPGA and a configuration memory device coupled to the FPGA for providing the FPGA with configuration information. The configuration memory device is programmed with configuration data and dormant data. The FPGA system is also provided with a configuration assist circuit coupled to the FPGA and the configuration memory device for controlling loading of configuration information from the configuration memory device to the FPGA. A tamper detection system provides a tamper signal to the FPGA, wherein when a tamper signal is received by the FPGA the configuration data is replaced with the dormant data.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: April 17, 2012
    Inventors: James M. Lewis, Joey R. Haddock, Dane R. Walther