Patents by Inventor Johan T. Strydom

Johan T. Strydom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10600674
    Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: March 24, 2020
    Assignee: Efficient Power Conversion Corporation
    Inventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
  • Publication number: 20190252238
    Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.
    Type: Application
    Filed: April 18, 2019
    Publication date: August 15, 2019
    Inventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
  • Patent number: 10312131
    Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: June 4, 2019
    Assignee: Efficient Power Converson Corporation
    Inventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
  • Patent number: 10230341
    Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: March 12, 2019
    Assignee: Efficient Power Conversion Corporation
    Inventors: Michael A. de Rooij, Johan T. Strydom, Bhaskaran R. Nair
  • Patent number: 10084445
    Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: September 25, 2018
    Assignee: Efficient Power Conversion Corporation
    Inventors: Michael A. de Rooij, Johan T. Strydom, David C. Reusch
  • Publication number: 20180131335
    Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.
    Type: Application
    Filed: January 8, 2018
    Publication date: May 10, 2018
    Inventors: Michael A. de Rooij, Johan T. Strydom, Bhaskaran R. Nair
  • Patent number: 9887677
    Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: February 6, 2018
    Assignee: Efficient Power Conversion Corporation
    Inventors: Michael A. de Rooij, Johan T. Strydom, Bhaskaran R. Nair
  • Publication number: 20170230046
    Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.
    Type: Application
    Filed: April 26, 2017
    Publication date: August 10, 2017
    Inventors: Michael A. de Rooij, Johan T. Strydom, David C. Reusch
  • Publication number: 20170162429
    Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.
    Type: Application
    Filed: February 16, 2017
    Publication date: June 8, 2017
    Inventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
  • Patent number: 9667245
    Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: May 30, 2017
    Assignee: Efficient Power Conversion Corporation
    Inventors: Michael A. De Rooij, Johan T. Strydom, David C. Reusch
  • Patent number: 9484862
    Abstract: A circuit and technique are provided to control bias setting to an FET based common source RF amplifier that can operate with large signals present. The circuit and technique described herein use a second FET in an identical circuit having the gate circuits connected in parallel and being sourced by the same drain voltage that serves as a reference to a first circuit bias setting. The drain current in a first FET will include both the bias and RF amplification current, whereas the second FET only carries the bias current. Because the devices and circuits are matched, the gate voltage variations will appear in both FETs thereby providing regulation of the drain current.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: November 1, 2016
    Assignee: Efficient Power Conversion Corporation
    Inventors: Michael A. de Rooij, Johan T. Strydom
  • Publication number: 20160105173
    Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.
    Type: Application
    Filed: October 7, 2015
    Publication date: April 14, 2016
    Inventors: Michael A. De Rooij, Johan T. Strydom, David C. Reusch
  • Publication number: 20150069855
    Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.
    Type: Application
    Filed: September 9, 2014
    Publication date: March 12, 2015
    Inventors: Michael A. De Rooij, Johan T. Strydom, Bhaskaran R. Nair
  • Publication number: 20150061777
    Abstract: A circuit and technique are provided to control bias setting to an FET based common source RF amplifier that can operate with large signals present. The circuit and technique described herein use a second FET in an identical circuit having the gate circuits connected in parallel and being sourced by the same drain voltage that serves as a reference to a first circuit bias setting. The drain current in a first FET will include both the bias and RF amplification current, whereas the second FET only carries the bias current. Because the devices and circuits are matched, the gate voltage variations will appear in both FETs thereby providing regulation of the drain current.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 5, 2015
    Inventors: Michael A. de Rooij, Johan T. Strydom