Patents by Inventor Johan T. Strydom
Johan T. Strydom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10600674Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.Type: GrantFiled: April 18, 2019Date of Patent: March 24, 2020Assignee: Efficient Power Conversion CorporationInventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
-
Publication number: 20190252238Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.Type: ApplicationFiled: April 18, 2019Publication date: August 15, 2019Inventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
-
Patent number: 10312131Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.Type: GrantFiled: February 16, 2017Date of Patent: June 4, 2019Assignee: Efficient Power Converson CorporationInventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
-
Patent number: 10230341Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.Type: GrantFiled: January 8, 2018Date of Patent: March 12, 2019Assignee: Efficient Power Conversion CorporationInventors: Michael A. de Rooij, Johan T. Strydom, Bhaskaran R. Nair
-
Patent number: 10084445Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.Type: GrantFiled: April 26, 2017Date of Patent: September 25, 2018Assignee: Efficient Power Conversion CorporationInventors: Michael A. de Rooij, Johan T. Strydom, David C. Reusch
-
Publication number: 20180131335Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.Type: ApplicationFiled: January 8, 2018Publication date: May 10, 2018Inventors: Michael A. de Rooij, Johan T. Strydom, Bhaskaran R. Nair
-
Patent number: 9887677Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.Type: GrantFiled: September 9, 2014Date of Patent: February 6, 2018Assignee: Efficient Power Conversion CorporationInventors: Michael A. de Rooij, Johan T. Strydom, Bhaskaran R. Nair
-
Publication number: 20170230046Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.Type: ApplicationFiled: April 26, 2017Publication date: August 10, 2017Inventors: Michael A. de Rooij, Johan T. Strydom, David C. Reusch
-
Publication number: 20170162429Abstract: Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.Type: ApplicationFiled: February 16, 2017Publication date: June 8, 2017Inventors: Alexander Lidow, Jianjun Cao, Robert Beach, Johan T. Strydom, Alana Nakata, Guangyuan Zhao
-
Patent number: 9667245Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.Type: GrantFiled: October 7, 2015Date of Patent: May 30, 2017Assignee: Efficient Power Conversion CorporationInventors: Michael A. De Rooij, Johan T. Strydom, David C. Reusch
-
Patent number: 9484862Abstract: A circuit and technique are provided to control bias setting to an FET based common source RF amplifier that can operate with large signals present. The circuit and technique described herein use a second FET in an identical circuit having the gate circuits connected in parallel and being sourced by the same drain voltage that serves as a reference to a first circuit bias setting. The drain current in a first FET will include both the bias and RF amplification current, whereas the second FET only carries the bias current. Because the devices and circuits are matched, the gate voltage variations will appear in both FETs thereby providing regulation of the drain current.Type: GrantFiled: September 4, 2014Date of Patent: November 1, 2016Assignee: Efficient Power Conversion CorporationInventors: Michael A. de Rooij, Johan T. Strydom
-
Publication number: 20160105173Abstract: An electrical circuit arranged in a half bridge topology. The electrical circuit includes a high side transistor; a low side transistor; a gate driver and level shifter electrically coupled to a gate of the high side transistor; a gate driver electrically coupled to a gate of the low side transistor; a capacitor electrically coupled in parallel with the gate driver and level shifter; a voltage source electrically coupled to an input of the gate driver and level shifter and an input of the gate driver; and, a bootstrap transistor electrically coupled between the voltage source and the capacitor. A GaN field-effect transistor is synchronously switched with a low side device of the half bridge circuit.Type: ApplicationFiled: October 7, 2015Publication date: April 14, 2016Inventors: Michael A. De Rooij, Johan T. Strydom, David C. Reusch
-
Publication number: 20150069855Abstract: A high efficiency voltage mode class D amplifier and energy transfer system is provided. The amplifier and system includes a pair of transistors connected in series between a voltage source and a ground connection. Further, a ramp current tank circuit is coupled in parallel with one of the pair of transistors and a resonant tuned load circuit is coupled to the ramp current tank circuit. The ramp current tank circuit can include an inductor that absorbs an output capacitance COSS of the pair of transistors and a capacitor the provides DC blocking.Type: ApplicationFiled: September 9, 2014Publication date: March 12, 2015Inventors: Michael A. De Rooij, Johan T. Strydom, Bhaskaran R. Nair
-
Publication number: 20150061777Abstract: A circuit and technique are provided to control bias setting to an FET based common source RF amplifier that can operate with large signals present. The circuit and technique described herein use a second FET in an identical circuit having the gate circuits connected in parallel and being sourced by the same drain voltage that serves as a reference to a first circuit bias setting. The drain current in a first FET will include both the bias and RF amplification current, whereas the second FET only carries the bias current. Because the devices and circuits are matched, the gate voltage variations will appear in both FETs thereby providing regulation of the drain current.Type: ApplicationFiled: September 4, 2014Publication date: March 5, 2015Inventors: Michael A. de Rooij, Johan T. Strydom