Patents by Inventor Johanes F. Swenberg
Johanes F. Swenberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11923441Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.Type: GrantFiled: August 16, 2022Date of Patent: March 5, 2024Assignee: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
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Patent number: 11529592Abstract: Gas injectors for providing uniform flow of fluid are provided herein. The gas injector includes a plenum body. The plenum body includes a recess, a protrusion adjacent to the recess and extending laterally away from the plenum body, and a plurality of nozzles extending laterally from an exterior surface of the plenum body. The plenum body has a plurality of holes in an exterior wall of the plenum body. Each nozzle is in fluid communication with an interior volume of the plenum body. By directing the flow of fluid, the gas injector provides for a uniform deposition.Type: GrantFiled: July 1, 2021Date of Patent: December 20, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Vishwas Kumar Pandey, Lara Hawrylchak, Eric Kihara Shono, Kartik Shah, Christopher S. Olsen, Sairaju Tallavarjula, Kailash Pradhan, Rene George, Johanes F. Swenberg, Stephen Moffatt
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Publication number: 20220399457Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.Type: ApplicationFiled: August 16, 2022Publication date: December 15, 2022Applicant: Applied Materials, Inc.Inventors: Steven C.H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
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Patent number: 11456178Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.Type: GrantFiled: June 15, 2021Date of Patent: September 27, 2022Assignee: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes F. Swenberg
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Patent number: 11450759Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.Type: GrantFiled: September 30, 2020Date of Patent: September 20, 2022Assignee: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
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Patent number: 11322347Abstract: Embodiments described herein generally relate to conformal oxidation processes for flash memory devices. In conventional oxidation processes for gate structures, growth rates have become too fast, ultimately creating non-conformal films. To create a preferred growth rate for SiO2 on SiNx films, embodiments in this disclosure use a thermal combustion of a ternary mixture of H2+O2+N2O to gain SiO2 out of Si containing compounds. Using this mixture provides a lower growth in comparison with using only H2 and O2, resulting in a lower sticking coefficient. The lower sticking coefficient allows an optimal amount of atoms to reach the bottom of the gate, improving the conformality in 3D NAND SiO2 oxidation layers, specifically for ONO replacement tunneling gate formation.Type: GrantFiled: October 22, 2019Date of Patent: May 3, 2022Assignee: Applied Materials, Inc.Inventors: Johanes F. Swenberg, Taewan Kim, Christopher S. Olsen, Erika Hansen
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Publication number: 20210398814Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.Type: ApplicationFiled: June 15, 2021Publication date: December 23, 2021Applicant: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes F. Swenberg
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Patent number: 11189479Abstract: A method of forming an electronic device is disclosed. The method comprises forming a barrier layer on a silicon layer, and depositing a silicon oxide layer on the barrier layer. The formation of the barrier layer on the silicon layer minimizes parasitic oxidation of the underlying silicon layer and minimizes defects in the silicon layer.Type: GrantFiled: May 4, 2020Date of Patent: November 30, 2021Assignee: Applied Materials, Inc.Inventors: Benjamin Colombeau, Johanes F. Swenberg, Steven C. H. Hung
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Publication number: 20210322934Abstract: Gas injectors for providing uniform flow of fluid are provided herein. The gas injector includes a plenum body. The plenum body includes a recess, a protrusion adjacent to the recess and extending laterally away from the plenum body, and a plurality of nozzles extending laterally from an exterior surface of the plenum body. The plenum body has a plurality of holes in an exterior wall of the plenum body. Each nozzle is in fluid communication with an interior volume of the plenum body. By directing the flow of fluid, the gas injector provides for a uniform deposition.Type: ApplicationFiled: July 1, 2021Publication date: October 21, 2021Inventors: Vishwas Kumar PANDEY, Lara HAWRYLCHAK, Eric Kihara SHONO, Kartik SHAH, Christopher S. OLSEN, Sairaju TALLAVARJULA, Kailash PRADHAN, Rene GEORGE, Johanes F. SWENBERG, Stephen MOFFATT
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Patent number: 11077410Abstract: Gas injectors for providing uniform flow of fluid are provided herein. The gas injector includes a plenum body. The plenum body includes a recess, a protrusion adjacent to the recess and extending laterally away from the plenum body, and a plurality of nozzles extending laterally from an exterior surface of the plenum body. The plenum body has a plurality of holes in an exterior wall of the plenum body. Each nozzle is in fluid communication with an interior volume of the plenum body. By directing the flow of fluid, the gas injector provides for a uniform deposition.Type: GrantFiled: August 29, 2018Date of Patent: August 3, 2021Assignee: Applied Materials, Inc.Inventors: Vishwas Kumar Pandey, Lara Hawrylchak, Eric Kihara Shono, Kartik Shah, Christopher S. Olsen, Sairaju Tallavarjula, Kailash Pradhan, Rene George, Johanes F. Swenberg, Stephen Moffatt
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Publication number: 20210193468Abstract: A method of forming a semiconductor structure includes annealing a surface of a substrate in an ambient of hydrogen to smooth the surface, pre-cleaning the surface of the substrate, depositing a high-? dielectric layer on the pre-cleaned surface of the substrate, performing a re-oxidation process to thermally oxidize the surface of the substrate; performing a plasma nitridation process to insert nitrogen atoms in the deposited high-? dielectric layer, and performing a post-nitridation anneal process to passivate chemical bonds in the plasma nitridated high-? dielectric layer.Type: ApplicationFiled: March 4, 2021Publication date: June 24, 2021Applicant: Applied Materials, Inc.Inventors: Steven C.H. Hung, Lin Dong, Benjamin Colombeau, Johanes F. Swenberg, Linlin Wang
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Publication number: 20210104617Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.Type: ApplicationFiled: September 30, 2020Publication date: April 8, 2021Applicant: Applied Materials, Inc.Inventors: Steven C.H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
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Publication number: 20200357629Abstract: A method of forming an electronic device is disclosed. The method comprises forming a barrier layer on a silicon layer, and depositing a silicon oxide layer on the barrier layer. The formation of the barrier layer on the silicon layer minimizes parasitic oxidation of the underlying silicon layer and minimizes defects in the silicon layer.Type: ApplicationFiled: May 4, 2020Publication date: November 12, 2020Applicant: Applied Materials, Inc.Inventors: Benjamin Colombeau, Johanes F. Swenberg, Steven C.H. Hung
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Publication number: 20200194251Abstract: Embodiments described herein generally relate to conformal oxidation processes for flash memory devices. In conventional oxidation processes for gate structures, growth rates have become too fast, ultimately creating non-conformal films. To create a preferred growth rate for SiO2 on SiNx films, embodiments in this disclosure use a thermal combustion of a ternary mixture of H2+O2+N2O to gain SiO2 out of Si containing compounds. Using this mixture provides a lower growth in comparison with using only H2 and O2, resulting in a lower sticking coefficient. The lower sticking coefficient allows an optimal amount of atoms to reach the bottom of the gate, improving the conformality in 3D NAND SiO2 oxidation layers, specifically for ONO replacement tunneling gate formation.Type: ApplicationFiled: October 22, 2019Publication date: June 18, 2020Inventors: Johanes F. SWENBERG, Taewan KIM, Christopher S. OLSEN, Erika HANSEN
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Publication number: 20200075332Abstract: A method of forming a silicon cap which comprises substantially no germanium atoms nor oxygen atoms is disclosed. Methods for controlling the oxidation of a silicon cap layer are also disclosed. Methods of forming a metal gate replacement which utilize the disclosed silicon cap and controlled oxidation are also disclosed.Type: ApplicationFiled: September 3, 2019Publication date: March 5, 2020Inventors: Johanes F. Swenberg, Abhishek Dube, Steven C.H. Hung, Benjamin Colombeau
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Patent number: 9012336Abstract: Disclosed are apparatus and methods for processing a substrate. The substrate having a feature with a layer thereon is exposed to an inductively coupled plasma which forms a substantially conformal layer.Type: GrantFiled: April 8, 2013Date of Patent: April 21, 2015Assignee: Applied Materials, Inc.Inventors: Heng Pan, Matthew Scott Rogers, Johanes F. Swenberg, Christopher S. Olsen, Wei Liu, David Chu, Malcom J. Bevan
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Patent number: 8999106Abstract: The present invention generally provides methods and apparatus for controlling edge performance during process. One embodiment of the present invention provides an apparatus comprising a chamber body defining a process volume, a gas inlet configured to flow a process gas into the process volume, and a supporting pedestal disposed in the process volume. The supporting pedestal comprises a top plate having a substrate supporting surface configured to receive and support the substrate on a backside, and an edge surface configured to circumscribe the substrate along an outer edge of the substrate, and a height difference between a top surface of the substrate and the edge surface is used to control exposure of an edge region of the substrate to the process gas.Type: GrantFiled: December 19, 2007Date of Patent: April 7, 2015Assignee: Applied Materials, Inc.Inventors: Wei Liu, Johanes F. Swenberg, Hanh D. Nguyen, Son T. Nguyen, Roger Curtis, Philip A. Bottini, Michael J. Mark
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Publication number: 20140302686Abstract: Disclosed are apparatus and methods for processing a substrate. The substrate having a feature with a layer thereon is exposed to an inductively coupled plasma which forms a substantially conformal layer.Type: ApplicationFiled: April 8, 2013Publication date: October 9, 2014Inventors: Heng Pan, Matthew Scott Rogers, Johanes F. Swenberg, Christopher S. Olsen, Wei Liu, David Chu, Malcolm J. Bevan
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Publication number: 20140273530Abstract: Provided are methods post deposition treatment of films comprising SiN. Certain methods pertain to providing a film comprising SiN; and exposing the film to an inductively coupled plasma, capacitively coupled plasma or a microwave plasma to provide a treated film with a modulated film stress and/or wet etch rate in dilute HF. Certain other methods comprise depositing a PEALD SiN film followed by exposure to a plasma nitridation process or a UV treatment to provide a treated film.Type: ApplicationFiled: March 14, 2014Publication date: September 18, 2014Inventors: Victor Nguyen, Isabelita Roflox, Mihaela Balseanu, Li-Qun Xia, Heng Pan, Wei Liu, Malcolm J. Bevan, Christopher S. Olsen, Johanes F. Swenberg
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Patent number: 8435906Abstract: Methods and apparatus for forming an oxide layer on a semiconductor substrate are disclosed. In one or more embodiments, plasma oxidation is used to form a conformal oxide layer by controlling the temperature of the semiconductor substrate at below about 100° C. Methods for controlling the temperature of the semiconductor substrate according to one or more embodiments include utilizing an electrostatic chuck and a coolant and gas convection.Type: GrantFiled: January 22, 2010Date of Patent: May 7, 2013Assignee: Applied Materials, Inc.Inventors: Agus S. Tjandra, Christopher S. Olsen, Johanes F. Swenberg, Yoshitaka Yokota