Patents by Inventor Johann Baptist Daniel Kuebrich
Johann Baptist Daniel Kuebrich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9263955Abstract: A method is disclosed of controlling a switched mode converter comprising a switch and for providing power to device having a load, comprising: in response to the load exceeding a first threshold, operating in a first mode, being a CCM; in response to the load exceeding a second threshold and not exceeding the first threshold, operating in second mode, being a BCM without valley skipping wherein the switching frequency increases with decreasing load; in response to the load exceeding a third threshold and not exceeding the second threshold, operating in a third mode, being a BCM with valley skipping, wherein the switching frequency depends on the load and the number of valleys skipped and is between a fixed upper and a lower switching frequency limit; and in response to the load not exceeding the third threshold, operating in a fourth mode, being a BCM with valley skipping, wherein the switching frequency depends on at least the load, and is between an upper and a lower switching frequency limit wherein the uType: GrantFiled: September 3, 2012Date of Patent: February 16, 2016Assignee: NXP B.V.Inventors: Markus Schmid, Johann Baptist Daniel Kuebrich, Thomas Antonius Duerbaum, Hans Halberstadt, Gian Hoogzaad, Frans Pansier
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Publication number: 20150117066Abstract: A method is disclosed of controlling a switched mode converter comprising a switch and for providing power to device having a load, comprising: in response to the load exceeding a first threshold, operating in a first mode, being a CCM; in response to the load exceeding a second threshold and not exceeding the first threshold, operating in second mode, being a BCM without valley skipping wherein the switching frequency increases with decreasing load; in response to the load exceeding a third threshold and not exceeding the second threshold, operating in a third mode, being a BCM with valley skipping, wherein the switching frequency depends on the load and the number of valleys skipped and is between a fixed upper and a lower switching frequency limit; and in response to the load not exceeding the third threshold, operating in a fourth mode, being a BCM with valley skipping, wherein the switching frequency depends on at least the load, and is between an upper and a lower switching frequency limit wherein the uType: ApplicationFiled: September 3, 2012Publication date: April 30, 2015Inventors: Markus Schmid, Johann Baptist Daniel Kuebrich, Thomas Antonius Duerbaum, Hans Halberstadt, Gian Hoogzaad, Frans Pansier
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Patent number: 9007730Abstract: A surge protection circuit for a circuit having a rectification module. The surge protection circuit includes a first diode, a second diode, a capacitor and a discharge device. The anode of the first diode is connected to a first input of the rectification module, and the anode of the second diode is connected to a second input of the rectification module. The cathodes of the first and second diodes are both connected to the first plate of the capacitor. The second plate of the capacitor is connected to the negative output of the rectification module. The capacitor is configured such that it is consistently charged to substantially the peak value of a supply voltage during normal operation between surge events.Type: GrantFiled: December 29, 2010Date of Patent: April 14, 2015Assignee: NXP B.V.Inventors: Markus Schmid, Johann Baptist Daniel Kuebrich, Thomas Antonius Duerbaum, Gian Hoogzaad, Peter Laro, Frans Pansier
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Patent number: 8730698Abstract: A power conversion controller for controlling the operation of a switch in a power conversion circuit, wherein the power conversion controller is configured to operate the switch according to: a variable frequency mode of operation for switching frequencies greater than a minimum threshold value; and a fixed frequency mode of operation at a switching frequency equal to the minimum threshold value.Type: GrantFiled: December 29, 2010Date of Patent: May 20, 2014Assignee: NXP B.V.Inventors: Thomas Antonius Duerbaum, Johann Baptist Daniel Kuebrich, Hans Halberstadt, Frans Pansier, Markus Schmid
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Patent number: 8692480Abstract: A power supply unit is provided which comprises an AC/DC conversion unit with an input to which an input voltage is coupled and an output to which a DC bus voltage is coupled. The power supply unit furthermore comprises a DC bus capacitor which is coupled to the output of the AC/DC conversion unit. The power supply unit furthermore comprises at least one sub-power supply unit receiving the DC bus voltage as input for providing at least one power supply. The power supply of the at least one sub-power supply unit or part of the load is at least reduced or switched off if the input voltage falls below a predetermined threshold value.Type: GrantFiled: September 4, 2009Date of Patent: April 8, 2014Assignee: NXP B.V.Inventors: Markus Schmid, Thomas Antonius Duerbaum, Gian Hoogzaad, Peter Laro, Johann Baptist Daniel Kuebrich
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Patent number: 8614902Abstract: A power factor correction stage comprising: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a first converter stage and one or more further converter stages, wherein each of the converter stages is connected to the input terminal and the output terminal, and each converter stage comprises a switch; and a controller configured to operate the switches of the converter stages. The controller is configured to operate the switch of the one or more further converter stages at a period of time after operation of the switch of the first converter stage for a current switching cycle, wherein the period of time corresponds to a proportion of the switching frequency for an earlier switching cycle that does not correspond to substantially the period of the earlier switching cycle divided by the number of converter stages.Type: GrantFiled: December 29, 2010Date of Patent: December 24, 2013Assignee: NXP B.V.Inventors: Frans Pansier, Thomas Antonius Duerbaum, Markus Schmid, Klaus Mühlbauer, Johann Baptist Daniel Kuebrich
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Patent number: 8605465Abstract: Consistent with an example embodiment, there is a method of controlling a synchronous rectifier having an input signal having oscillations therein and a switch which is switchable between an open state and a closed state. The method comprises filtering the input signal to produce a filtered signal, comparing the filtered signal with a reference value, and opening the switch in response to the comparison, in which the filtering is active filtering. The active filtering may be based on determination of the peaks (positive and/or negative) of the signal, either directly, including a quarter period offset, or including decay—or a combination of the above; alternatively, the active filtering may be based on the a smoothing functions such as a switched low-pass filter or a short time integrator.Type: GrantFiled: December 3, 2010Date of Patent: December 10, 2013Assignee: NXP B.V.Inventors: Johann Baptist Daniel Kuebrich, Markus Schmid, Thomas Antonius Duerbaum, Frans Pansier, Gian Hoogzaad, Hans Halberstadt
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Patent number: 8599579Abstract: Consistent with an example embodiment, there is a control method which reduces the steps: instead of a constant on-time for the switch, the duration of the on-time is increased each time an additional valley to be skipped. The predetermined increase may be either a fixed fractional increase or a further additional increment; it may be determined by a small regulation loop that multiplies the on-time from the main loop with a factor equal to the ratio between measured period time and the sum of primary and secondary stroke times.Type: GrantFiled: November 30, 2010Date of Patent: December 3, 2013Assignee: NXP B.V.Inventors: Johann Baptist Daniel Kuebrich, Thomas Antonius Duerbaum, Hans Halberstadt
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Patent number: 8441237Abstract: Consistent with an example embodiment, a circuit comprises a power factor correction stage having a DC input, a ground input, a DC output and a ground output. The circuit further includes a capacitor; a diode; and a discharge circuit. A first terminal of the diode is connected to an input of the power factor correction stage, a second terminal of the diode is connected to the first plate of the capacitor; and the second plate of the capacitor is connected to the other input of the PFC stage. The discharge circuit is connected to the capacitor and is configured to discharge the capacitor such that it contributes to the output of the PFC stage when the level of a signal at the input of the PFC stage falls below a threshold value.Type: GrantFiled: December 29, 2010Date of Patent: May 14, 2013Assignee: NXP B.V.Inventors: Markus Schmid, Johann Baptist Daniel Kuebrich, Thomas Antonius Duerbaum, Gian Hoogzaad, Peter Laro, Frans Pansier
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Publication number: 20120008350Abstract: For many applications an SMPS is designed to operate in boundary conduction mode. As the load decreases the switching frequency increases, and so the concept of valley skipping may be used in which the switching frequency is clamped, by delaying to turn on the time of the active switch, for an integral number of cycles of a resonant circuit in the SMPS. With further reduction of the load, additional valleys may be skipped. However, each change in the number of valleys skipped results in a step in the input current that is drawn, distorting the ideal mains sine wave, thereby increasing unwanted harmonics. Consistent with an example embodiment, there is a control method which reduces the steps: instead of a constant on-time for the switch, the duration of the on-time is increased each time an additional valley to be skipped.Type: ApplicationFiled: November 30, 2010Publication date: January 12, 2012Applicant: NXP B.V.Inventors: Johann Baptist Daniel KUEBRICH, Thomas Antonius DUERBAUM, Hans HALBERSTADT
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Publication number: 20110317459Abstract: A power conversion controller for controlling the operation of a switch in a power conversion circuit. The switch having a “time-on” property and a “clamping frequency” property, in use. The power conversion controller comprises a detector configured to detect one or more operational parameter values of the power conversion circuit, and a clamping frequency adjuster configured to adjust the clamping frequency of the switch in accordance with the one or more detected parameter values in order to maintain the “time-on” property of the switch above a minimum threshold value.Type: ApplicationFiled: October 8, 2010Publication date: December 29, 2011Applicant: NXP B.V.Inventors: Johann Baptist Daniel KUEBRICH, Markus SCHMID, Thomas Antonius DUERBAUM, Hans HALBERSTADT
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Publication number: 20110261599Abstract: A power conversion controller for controlling the operation of a switch in a power conversion circuit, wherein the power conversion controller is configured to operate the switch according to: a variable frequency mode of operation for switching frequencies greater than a minimum threshold value; and a fixed frequency mode of operation at a switching frequency equal to the minimum threshold value.Type: ApplicationFiled: December 29, 2010Publication date: October 27, 2011Applicant: NXP B.V.Inventors: Thomas Antonius DUERBAUM, Johann Baptist Daniel KUEBRICH, Hans HALBERSTADT, Frans PANSIER, Markus SCHMID
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Publication number: 20110255314Abstract: A power supply module having a PFC stage has a hold-up capacitor (34) for continuing output power for a time after an ac power supply (2) stops. The hold-up capacitor is charged by a winding (40) driven magnetically from a first winding (24); the first winding (24) may be the winding used in a boost converter stage, such as commonly used in a PFC stage, or alternatively the winding in an alternative stage such as a flyback converter.Type: ApplicationFiled: December 21, 2009Publication date: October 20, 2011Applicant: NXP B.V.Inventors: Johann Baptist Daniel Kuebrich, Thomas Antonius Duerbaum, Marcus Schmid, Hans Halberstadt
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Publication number: 20110193612Abstract: Consistent with an example embodiment, there is a method of controlling a synchronous rectifier having an input signal having oscillations therein and a switch which is switchable between an open state and a closed state. The method comprises filtering the input signal to produce a filtered signal, comparing the filtered signal with a reference value, and opening the switch in response to the comparison, in which the filtering is active filtering. The active filtering may be based on determination of the peaks (positive and/or negative) of the signal, either directly, including a quarter period offset, or including decay—or a combination of the above; alternatively, the active filtering may be based on the a smoothing functions such as a switched low-pass filter or a short time integrator.Type: ApplicationFiled: December 3, 2010Publication date: August 11, 2011Applicant: NXP B.V.Inventors: Johann Baptist Daniel KUEBRICH, Markus SCHMID, Thomas Antonius DUERBAUM, Frans PANSIER, Gian HOOGZAAD, Hans HALBERSTADT
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Publication number: 20110188273Abstract: A power factor correction stage comprising: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a first converter stage and one or more further converter stages, wherein each of the converter stages is connected to the input terminal and the output terminal, and each converter stage comprises a switch; and a controller configured to operate the switches of the converter stages. The controller is configured to operate the switch of the one or more further converter stages at a period of time after operation of the switch of the first converter stage for a current switching cycle, wherein the period of time corresponds to a proportion of the switching frequency for an earlier switching cycle that does not correspond to substantially the period of the earlier switching cycle divided by the number of converter stages.Type: ApplicationFiled: December 29, 2010Publication date: August 4, 2011Applicant: NXP B.V.Inventors: Frans PANSIER, Thomas Antonius DUERBAUM, Markus SCHMID, Klaus Mühlbauer, Johann Baptist Daniel KUEBRICH
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Publication number: 20110188270Abstract: A circuit comprising a power factor correction stage having a DC input, a ground input, a DC output and a ground output; a capacitor; a diode; and discharge means. A first terminal of the diode is connected to an input of the power factor correction stage, a second terminal of the diode is connected to the first plate of the capacitor; and the second plate of the capacitor is connected to the other input of the PFC stage. The discharge means is connected to the capacitor and is configured to discharge the capacitor such that it contributes to the output of the PFC stage when the level of a signal at the input of the PFC stage falls below a threshold value.Type: ApplicationFiled: December 29, 2010Publication date: August 4, 2011Applicant: NXP B.V.Inventors: Markus SCHMID, Johann Baptist Daniel KUEBRICH, Thomas Antonius DUERBAUM, Gian HOOGZAAD, Peter LARO, Frans PANSIER
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Publication number: 20110163695Abstract: A power supply unit is provided which comprises an AC/DC conversion unit with an input to which an input voltage is coupled and an output to which a DC bus voltage is coupled. The power supply unit furthermore comprises a DC bus capacitor which is coupled to the output of the AC/DC conversion unit. The power supply unit furthermore comprises at least one sub-power supply unit receiving the DC bus voltage as input for providing at least one power supply. The power supply of the at least one sub-power supply unit or part of the load is at least reduced or switched off if the input voltage falls below a predetermined threshold value.Type: ApplicationFiled: September 4, 2009Publication date: July 7, 2011Applicant: NXP B.V.Inventors: Markus Schmid, Thomas Antonius Duerbaum, Gian Hoogzaad, Peter Laro, Johann Baptist Daniel Kuebrich
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Publication number: 20110164339Abstract: A surge protection circuit for a circuit having a rectification module. The surge protection circuit includes a first diode, a second diode, a capacitor and a discharge device. The anode of the first diode is connected to a first input of the rectification module, and the anode of the second diode is connected to a second input of the rectification module. The cathodes of the first and second diodes are both connected to the first plate of the capacitor. The second plate of the capacitor is connected to the negative output of the rectification module. The capacitor is configured such that it is consistently charged to substantially the peak value of a supply voltage during normal operation between surge events.Type: ApplicationFiled: December 29, 2010Publication date: July 7, 2011Applicant: NXP B.V.Inventors: Markus SCHMID, Johann Baptist Daniel KUEBRICH, Thomas Antonius DUERBAUM, Gian HOOGZAAD, Peter LARO, Frans PANSIER