Patents by Inventor Johann Christoph Scheytt
Johann Christoph Scheytt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11463054Abstract: The invention relates to a circuit containing a transimpedance amplifier for converting two input currents into two output voltages, having a first amplifier part containing a first input, to which a first input voltage is applied, and into which a first input current flows, and having a second amplifier part containing a second input, to which a second input voltage is applied and into which a second input current flows, wherein the first amplifier part and the second amplifier part are connected to a common supply voltage, the first amplifier part and the second amplifier part are connected to a common current source, the input of the first amplifier part and the input of the second amplifier part have a differing direct voltage, and the first amplifier part and the second amplifier part are designed such that an output voltage of the first amplifier part is proportional to the input current of the first amplifier part and an output voltage of the second amplifier part is proportional to an input current ofType: GrantFiled: May 15, 2018Date of Patent: October 4, 2022Assignee: SICOYA GMBHInventors: Johann Christoph Scheytt, Sergiy Gudyriev
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Publication number: 20200212856Abstract: The invention relates to a circuit containing a transimpedance amplifier for converting two input currents into two output voltages, having a first amplifier part containing a first input, to which a first input voltage is applied, and into which a first input current flows, and having a second amplifier part containing a second input, to which a second input voltage is applied and into which a second input current flows, wherein the first amplifier part and the second amplifier part are connected to a common supply voltage, the first amplifier part and the second amplifier part are connected to a common current source, the input of the first amplifier part and the input of the second amplifier part have a differing direct voltage, and the first amplifier part and the second amplifier part are designed such that an output voltage of the first amplifier part is proportional to the input current of the first amplifier part and an output voltage of the second amplifier part is proportional to an input current ofType: ApplicationFiled: May 15, 2018Publication date: July 2, 2020Inventors: Johann Christoph SCHEYTT, Sergiy GUDYRIEV
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Patent number: 10403970Abstract: A chip antenna comprising at least one emitter which extends parallel to a main surface of a semiconductor substrate supporting the chip antenna, wherein the emitter is arranged on an island-like support zone of the semiconductor substrate, the support zone being surrounded by at least one trench which is completely filled with a gas, the trench passing through the entire depth of the semiconductor substrate and being bridged by at least one retaining web which forms a supporting connection between the support zone and the rest of the semiconductor substrate.Type: GrantFiled: December 23, 2013Date of Patent: September 3, 2019Assignee: IHP GMBH-INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS/LEIBNIZ-INSTITUT FUR INNOVATIVE MIKROELEKTRONIKInventors: Ruoyu Wang, Yaoming Sun, Johann Christoph Scheytt, Mehmet Kaynak
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Publication number: 20160072182Abstract: A chip antenna comprising at least one emitter which extends parallel to a main surface of a semiconductor substrate supporting the chip antenna, wherein the emitter is arranged on an island-like support zone of the semiconductor substrate, the support zone being surrounded by at least one trench which is completely filled with a gas, the trench passing through the entire depth of the semiconductor substrate and being bridged by at least one retaining web which forms a supporting connection between the support zone and the rest of the semiconductor substrate.Type: ApplicationFiled: December 23, 2013Publication date: March 10, 2016Inventors: Ruoyu Wang, Yaoming Sun, Johann Christoph Scheytt, Mehmet Kaynak
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Patent number: 9082809Abstract: A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterized in that the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer.Type: GrantFiled: May 17, 2012Date of Patent: July 14, 2015Assignee: IHP GmbH—Innovations for High Performance MicroelectronicsInventors: Jaroslaw Dabrowski, Wolfgang Mehr, Johann Christoph Scheytt, Grzegorz Lupina
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Patent number: 9025700Abstract: A digital polar modulator (DPM) for transforming a baseband signal into a modulated digital modulator output signal comprises an input unit and two low-pass delta-sigma modulators, a first one being connected downstream from the first input part and configured to provide at its output a first pulse train in dependence on an amplitude- modulating baseband signal component, and a second one being connected downstream from the second input part and configured to provide at its output a multilevel quantized signal in dependence on a phase modulating baseband signal component; a multiphase generator, which is configured to provide a set of square-wave carrier signals having a common carrier frequency and exhibiting discrete phase shifts with respect to each other; a multiplexer, which is configured to provide a multiplexer output signal that is formed by switching, in dependence on a signal received at a select input as a function of time, between selected ones of the carrier signals; and a combiner unit.Type: GrantFiled: December 16, 2011Date of Patent: May 5, 2015Assignees: Electronics and Telecommunications Research Institute, IHP GmbH—Innovations for High Performance Microelectronics/Leibniz-Institut für innovative MikroelektronikInventors: Pylyp Ostrovskyy, Johann Christoph Scheytt, Jae Ho Jung, Bong Hyuk Park, Sung Jun Lee
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Patent number: 8957404Abstract: A hot hole transistor with a graphene base comprises on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer.Type: GrantFiled: December 20, 2012Date of Patent: February 17, 2015Assignee: IHP GmbH—Innovations for High Performance MicroelectronicsInventors: Wolfgang Mehr, Jaroslaw Dabrowski, Max Lemme, Gunther Lippert, Grzegorz Lupina, Johann Christoph Scheytt
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Publication number: 20140307825Abstract: A digital polar modulator (DPM) for transforming a baseband signal into a modulated digital modulator output signal comprises an input unit and two low-pass delta-sigma modulators, a first one being connected downstream from the first input part and configured to provide at its output a first pulse train in dependence on an amplitude- modulating baseband signal component, and a second one being connected downstream from the second input part and configured to provide at its output a multilevel quantized signal in dependence on a phase modulating baseband signal component; a multiphase generator, which is configured to provide a set of square-wave carrier signals having a common carrier frequency and exhibiting discrete phase shifts with respect to each other; a multiplexer, which is configured to provide a multiplexer output signal that is formed by switching, in dependence on a signal received at a select input as a function of time, between selected ones of the carrier signals; and a combiner unit.Type: ApplicationFiled: December 16, 2011Publication date: October 16, 2014Applicants: Electronics and Telecommunications Research Institute, innovative MikroelektronikInventors: Pylyp Ostrovskyy, Johann Christoph Scheytt, Jae Ho Jung, Bong Hyuk Park, Sung Jun Lee
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Publication number: 20140027715Abstract: A hot hole transistor with a graphene base comprises on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer.Type: ApplicationFiled: December 20, 2012Publication date: January 30, 2014Applicant: IHP GmbH - Innovations for High Performance MicroelectronicsInventors: Wolfgang Mehr, Jaroslaw Dabrowski, Max Lemme, Gunther Lippert, Grzegorz Lupina, Johann Christoph Scheytt
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Patent number: 8477054Abstract: The present invention relates to a device (2000) and a method for encoding an input signal (102) into a digital pulse-width and/or phase modulated output signal (162). The present invention also relates to a transmission method, a power amplifier and a transmitter. With the aid of a mapping process comprising at least three-stages, a sequence of output pulses (162) is generated which corresponds on average over time to a theoretical, previously computed target pulse. In this way, the device (2000) or the method can be digitally implemented and a large part (100, 110) of the device (2000) can also be operated at a clock rate that is substantially lower than a clock rate of the output signal generator (200, 220).Type: GrantFiled: June 10, 2011Date of Patent: July 2, 2013Assignee: IHP GmbHInventor: Johann Christoph Scheytt
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Publication number: 20120292596Abstract: A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterized in that the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer.Type: ApplicationFiled: May 17, 2012Publication date: November 22, 2012Applicant: IHP GmbHInventors: Jaroslaw Dabrowski, Wolfgang Mehr, Johann Christoph Scheytt, Grzegorz Lupina
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Patent number: 8115543Abstract: The invention relates to an upstream unit (1) for a switched power amplifier (2) for a high-frequency transmission circuit (16). The upstream unit (1) supplies a pulse-length modulated HF pulse signal (22) to the switched power amplifier (2), wherein the linearity of the pulse length modulation and of the high-frequency transmission circuit is improved. The upstream unit (1) according to the invention has a first signal input (3) for a high-frequency, phase-modulated first input signal (18), a second signal input (4) for a second input signal (19) having a low frequency in comparison with the first input signal, a controllable first delay unit (5), a controllable second delay unit (7), a pulse generator (9) and a control unit (10).Type: GrantFiled: December 4, 2009Date of Patent: February 14, 2012Assignee: IHP GmbH—Innovations for High Performance Microelectronics/Leibniz—Institut fur Innovative MikroelektronikInventor: Johann Christoph Scheytt
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Publication number: 20110316625Abstract: The invention relates to an upstream unit (1) for a switched power amplifier (2) for a high-frequency transmission circuit (16). The upstream unit (1) supplies a pulse-length modulated HF pulse signal (22) to the switched power amplifier (2), wherein the linearity of the pulse length modulation and of the high-frequency transmission circuit is improved. The upstream unit (1) according to the invention has a first signal input (3) for a high-frequency, phase-modulated first input signal (18), a second signal input (4) for a second input signal (19) having a low frequency in comparison with the first input signal, a controllable first delay unit (5), a controllable second delay unit (7), a pulse generator (9) and a control unit (10).Type: ApplicationFiled: December 4, 2009Publication date: December 29, 2011Applicant: IM TECHNOLOGIEPARK 25Inventor: Johann Christoph Scheytt
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Publication number: 20110316731Abstract: The present invention relates to a device (2000) and a method for encoding an input signal (102) into a digital pulse-width and/or phase modulated output signal (162). The present invention also relates to a transmission method, a power amplifier and a transmitter. With the aid of a mapping process comprising at least three-stages, a sequence of output pulses (162) is generated which corresponds on average over time to a theoretical, previously computed target pulse. In this way, the device (2000) or the method can be digitally implemented and a large part (100, 110) of the device (2000) can also be operated at a clock rate that is substantially lower than a clock rate of the output signal generator (200, 220).Type: ApplicationFiled: June 10, 2011Publication date: December 29, 2011Applicant: IHP GmbH-Innovations for High Performance Microelectronics/Leibniz-Institut fur innovativeInventor: Johann Christoph Scheytt
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Patent number: 7423464Abstract: The invention relates to an apparatus for precise modulation of signal phase and signal delay, respectively, and signal amplitude, comprising a first fixed-delay device having its input coupled to an input signal, a first variable delay device having its input coupled to said input signal and having a control input for delay adjustment, a first amplitude control device in series with the first variable delay device, providing at its output an amplitude controlled signal and having a control input for adjusting the output amplitude, a phase detector with linear characteristic having its two inputs connected to the output of the fixed-delay device and the output of the first amplitude control device, an error measurement device having its negative input connected to the output of the phase detector and its positive input connected to a control signal, an amplifier with low-pass characteristic having its input connected to the output of the error measurement device and its output to the control input of the firsType: GrantFiled: April 3, 2007Date of Patent: September 9, 2008Inventor: Johann-Christoph Scheytt
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Patent number: 7319352Abstract: The invention relates to an apparatus for precise modulation of signal phase and signal delay, respectively, and signal amplitude, comprising a first fixed-delay device having its input coupled to an input signal, a first variable delay device having its input coupled to said input signal and having a control input for delay adjustment, a first amplitude control device in series with the first variable delay device, providing at its output an amplitude controlled signal and having a control input for adjusting the output amplitude, a phase detector with linear characteristic having its two inputs connected to the output of the fixed-delay device and the output of the first amplitude control device, an error measurement device having its negative input connected to the output of the phase detector and its positive input connected to a control signal, an amplifier with low-pass characteristic having its input connected to the output of the error measurement device and its output to the control input of the firsType: GrantFiled: April 4, 2006Date of Patent: January 15, 2008Inventor: Johann-Christoph Scheytt
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Publication number: 20070229117Abstract: The invention relates to an apparatus for precise modulation of signal phase and signal delay, respectively, and signal amplitude, comprising a first fixed-delay device having its input coupled to an input signal, a first variable delay device having its input coupled to said input signal and having a control input for delay adjustment, a first amplitude control device in series with the first variable delay device, providing at its output an amplitude controlled signal and having a control input for adjusting the output amplitude, a phase detector with linear characteristic having its two inputs connected to the output of the fixed-delay device and the output of the first amplitude control device, an error measurement device having its negative input connected to the output of the phase detector and its positive input connected to a control signal, an amplifier with low-pass characteristic having its input connected to the output of the error measurement device and its output to the control input of the firsType: ApplicationFiled: April 4, 2006Publication date: October 4, 2007Inventor: Johann-Christoph Scheytt
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Publication number: 20070230587Abstract: The invention relates to an apparatus for precise modulation of signal phase and signal delay, respectively, and signal amplitude, comprising a first fixed-delay device having its input coupled to an input signal, a first variable delay device having its input coupled to said input signal and having a control input for delay adjustment, a first amplitude control device in series with the first variable delay device, providing at its output an amplitude controlled signal and having a control input for adjusting the output amplitude, a phase detector with linear characteristic having its two inputs connected to the output of the fixed-delay device and the output of the first amplitude control device, an error measurement device having its negative input connected to the output of the phase detector and its positive input connected to a control signal, an amplifier with low-pass characteristic having its input connected to the output of the error measurement device and its output to the control input of the firsType: ApplicationFiled: April 3, 2007Publication date: October 4, 2007Inventor: Johann-Christoph Scheytt
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Patent number: 6961520Abstract: The present invention relates to a method for measurement of optical rsp. electrical signal sequences and an eye diagram monitor for measurement and display of signal sequences with at least one threshold decision circuit 3, at least one storage device 4, and an analysis device 5. With the eye diagram monitor in accordance with the present invention the generation of an eye diagram 1 is possible even at very high transmission data rates which is accomplished by at least one counter 6, a signal sequence S fed to an input 7 of the threshold decision circuit 3, an adjustable threshold value SW fed to the other input 8 of the threshold decision circuit 3, and the output 9 of the threshold decision circuit 3 connected with the input 10 of counter 6.Type: GrantFiled: September 8, 2003Date of Patent: November 1, 2005Assignee: Advico Microelectronics GmbHInventors: Gunther Grau, Johann Christoph Scheytt
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Publication number: 20040091261Abstract: The present invention relates to a method for measurement of optical rsp. electrical signal sequences and an eye diagram monitor for measurement and display of signal sequences with at least one threshold decision circuit 3, at least one storage device 4, and an analysis device 5.Type: ApplicationFiled: September 8, 2003Publication date: May 13, 2004Applicant: ADVICO MICROELECTRONICS GMBHInventors: Gunther Grau, Johann Christoph Scheytt