Patents by Inventor Johann G. Gaboriau

Johann G. Gaboriau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230366747
    Abstract: A current digital-to-analog converter may be used in a system for measuring temperature of a thermistor, with mismatch reduction techniques applied to digital-to-analog converter elements of the digital-to-analog converter in order to maximize accuracy and precisions of the temperature measurement.
    Type: Application
    Filed: March 28, 2023
    Publication date: November 16, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Vamsikrishna PARUPALLI, Zhong YOU, Johann G. GABORIAU, Amar VELLANKI, Vikrant ARUMUGAM
  • Publication number: 20230366754
    Abstract: A system and method provide on-line, wafer-level, die-level, or package-level thermal calibration of an integrated measurement resistor with a single temperature insertion. The system includes a measurement resistor integrated on a substrate with an unknown temperature coefficient and a temperature reference sensor thermally coupled to the measurement resistor. A measurement circuit measures an indication of a resistance of the measurement resistor. An electrically-controllable integrated heat source is operated by a controller to change a temperature of the measurement resistor and the temperature reference sensor and stores values of the resistance indication and the sensed temperature corresponding to multiple temperatures of the temperature of the measurement resistor and the temperature reference sensor.
    Type: Application
    Filed: August 9, 2022
    Publication date: November 16, 2023
    Inventors: Zhong You, Vamsikrishna Parupalli, Johann G. Gaboriau
  • Patent number: 11798978
    Abstract: A single integrated circuit may include a signal path configured to generate an output signal from an input signal, wherein the signal path includes an amplifier configured to drive the output signal, a direct-current-to-direct-current (DC-DC) power converter having a power inductor integrated in the single integrated circuit and configured to generate a supply voltage to the amplifier from a source voltage to the DC-DC power converter, and control circuitry for controlling operation of converter switches of the DC-DC power converter in order that the supply voltage tracks at least one among the input signal and the output signal.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: October 24, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: John L. Melanson, Lei Zhu, Wai-Shun Shum, Xiaofan Fei, Johann G. Gaboriau
  • Patent number: 11329620
    Abstract: A method for calibrating gain in a multi-path subsystem having a first processing path, a second processing path, and a mixed signal return path, may include low-pass filtering an input signal and a mixed signal return path signal generated from the input signal at subsonic frequencies to generate a filtered input signal and a filtered mixed signal return path signal and tracking and correcting for a gain difference between the first processing path and the second processing path based on the filtered input signal and the filtered mixed signal return path signal.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: May 10, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Johann G. Gaboriau, David M. Olivenbaum, Xiaofan Fei, Amar Vellanki, Venugopal Choukinishi, Gautham Sivasankar, Wai-Shun Shum
  • Patent number: 11271583
    Abstract: A differential output current digital-to-analog converter (IDAC) circuit may include a delta-sigma modulator configured to receive a digital input signal, a control circuit responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, the plurality of DAC elements configured to, in concert, generate a differential output current signal based on the digital input signal to a load coupled to a pair of output terminals of the IDAC, and an output impedance coupled between the pair of output terminals such that the output impedance is in parallel with the load.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: March 8, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Johann G. Gaboriau, Lei Zhu, Wai-Shun Shum, Xiaofan Fei, Leyi Yin
  • Patent number: 11119138
    Abstract: A method may include applying an excitation signal to a capacitor of the capacitive sensor which causes generation of a modulated signal from an input signal indicative of a variance in a capacitance of the capacitor, detecting the modulated signal with a detector to generate a detected modulated signal that has a phase shift relative to the excitation signal, demodulating the detected modulated signal into an in-phase component and a quadrature component using a reference signal, nullifying the quadrature component by setting a phase of the reference signal relative to the excitation signal to compensate for the phase shift, and outputting the in-phase component as an unmodulated output signal representative of the capacitance.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: September 14, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Vikrant Arumugam, Amar Vellanki, Vamsikrishna Parupalli, Zhong You, Johann G. Gaboriau, John L. Melanson
  • Patent number: 11050433
    Abstract: A system may include a current digital-to-analog converter (IDAC) configured to convert a digital input signal into an output current signal and a switched-mode power supply configured to provide electrical energy in the form of a supply voltage to the IDAC for operation of the IDAC, the switched-mode power supply configured to track a voltage signal derived from the digital input current signal and generate the supply voltage based on the voltage signal and a voltage headroom above the voltage signal.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: June 29, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Johann G. Gaboriau, Lei Zhu, Wai-Shun Shum, Xiaofan Fei, Leyi Yin
  • Patent number: 11043959
    Abstract: A differential output current digital-to-analog (IDAC) circuit may include a delta-sigma modulator configured to receive a digital input signal, a control circuit responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, the plurality of DAC elements configured to, in concert, generate a differential output current signal based on the digital input signal to a load coupled to a pair of output terminals of the IDAC, and a plurality of warming switches, each warming switch coupled to a respective bias transistor of a respective DAC element of the plurality of DAC elements, wherein the control circuit may further be configured to selectively control each such warming switch in order to selectively de-bias and bias a respective bias transistor of such warming switch when a respective DAC element of the respective bias transistor is output-disabled from generating the differential output current signal.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: June 22, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Johann G. Gaboriau, Lei Zhu, Wai-Shun Shum, Xiaofan Fei, Leyi Yin
  • Patent number: 11035894
    Abstract: A method for measuring a capacitive sensor output may include applying an excitation signal to a capacitor of the capacitive sensor which causes generation of a modulated signal from a baseband signal, wherein the excitation signal is of a carrier frequency which is higher than frequency content of the baseband signal, demodulating the modulated signal to generate an intermediate signal representative of a capacitance of the capacitor wherein the demodulating is based, at least in part, on the excitation signal, converting the intermediate signal into a pulse-density modulated output signal with a pulse-density modulator, and shaping a noise transfer function of the pulse-density modulator to have an approximate zero at the carrier frequency.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: June 15, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Amar Vellanki, Zhong You, Johann G. Gaboriau
  • Publication number: 20210175896
    Abstract: A system may include a current digital-to-analog converter (IDAC) configured to convert a digital input signal into an output current signal and a switched-mode power supply configured to provide electrical energy in the form of a supply voltage to the IDAC for operation of the IDAC, the switched-mode power supply configured to track a voltage signal derived from the digital input current signal and generate the supply voltage based on the voltage signal and a voltage headroom above the voltage signal.
    Type: Application
    Filed: July 31, 2020
    Publication date: June 10, 2021
    Inventors: John L. MELANSON, Johann G. GABORIAU, Lei ZHU, Wai-Shun SHUM, Xiaofan FEI, Leyi YIN
  • Publication number: 20210175894
    Abstract: A differential output current digital-to-analog (IDAC) circuit may include a delta-sigma modulator configured to receive a digital input signal, a control circuit responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, the plurality of DAC elements configured to, in concert, generate a differential output current signal based on the digital input signal to a load coupled to a pair of output terminals of the IDAC, and a plurality of warming switches, each warming switch coupled to a respective bias transistor of a respective DAC element of the plurality of DAC elements, wherein the control circuit may further be configured to selectively control each such warming switch in order to selectively de-bias and bias a respective bias transistor of such warming switch when a respective DAC element of the respective bias transistor is output-disabled from generating the differential output current signal.
    Type: Application
    Filed: July 29, 2020
    Publication date: June 10, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. MELANSON, Johann G. GABORIAU, Lei Zhu, Wai-Shun Shum, Xiaofan Fei, Leyi Yin
  • Publication number: 20210175322
    Abstract: A single integrated circuit may include a signal path configured to generate an output signal from an input signal, wherein the signal path includes an amplifier configured to drive the output signal, a direct-current-to-direct-current (DC-DC) power converter having a power inductor integrated in the single integrated circuit and configured to generate a supply voltage to the amplifier from a source voltage to the DC-DC power converter, and control circuitry for controlling operation of converter switches of the DC-DC power converter in order that the supply voltage tracks at least one among the input signal and the output signal.
    Type: Application
    Filed: September 14, 2020
    Publication date: June 10, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. MELANSON, Lei ZHU, Wai-Shun SHUM, Xiaofan FEI, Johann G. GABORIAU
  • Publication number: 20210175895
    Abstract: A differential output current digital-to-analog (IDAC) circuit may include a delta-sigma modulator configured to receive a digital input signal, a control circuit responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, the plurality of DAC elements configured to, in concert, generate a differential output current signal based on the digital input signal to a load coupled to a pair of output terminals of the IDAC, and an output impedance coupled between the pair of output terminals such that the output impedance is in parallel with the load.
    Type: Application
    Filed: July 31, 2020
    Publication date: June 10, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. MELANSON, Johann G. GABORIAU, Lei ZHU, Wai-Shun SHUM, Xiaofan FEI, Leyi YIN
  • Patent number: 10921159
    Abstract: A system may include a first resistive-inductive-capacitive sensor, a second resistive-inductive-capacitive sensor, and a measurement circuit communicatively coupled to the first resistive-inductive-capacitive sensor and the second resistive-inductive-capacitive sensor and configured to measure first phase information associated with the first resistive-inductive-capacitive sensor, measure second phase information associated with the second resistive-inductive-capacitive sensor, and based on the first phase information and the second phase information, determine a displacement of a mechanical member relative to the first resistive-inductive-capacitive sensor.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: February 16, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Tejasvi Das, Zhong You, Siddharth Maru, Eric J. King, Johann G. Gaboriau, Luke Lapointe, Matthew Beardsworth
  • Patent number: 10833657
    Abstract: In accordance with embodiments of the present disclosure, an apparatus may include a signal path comprising a closed-loop analog pulse width modulator having a forward signal path and a feedback path, a variable resistor coupled to an output of the closed-loop analog pulse width modulator, and a control circuit configured to modify the variable resistor in order to modify an output impedance outside of the feedback path of the closed-loop analog pulse width modulator responsive to a condition for switching between a high output impedance mode and a low output impedance mode of the closed-loop analog pulse width modulator or vice versa.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: November 10, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Tejasvi Das, Johann G. Gaboriau
  • Publication number: 20200343871
    Abstract: A method for calibrating gain in a multi-path subsystem having a first processing path, a second processing path, and a mixed signal return path, may include low-pass filtering an input signal and a mixed signal return path signal generated from the input signal at subsonic frequencies to generate a filtered input signal and a filtered mixed signal return path signal and tracking and correcting for a gain difference between the first processing path and the second processing path based on the filtered input signal and the filtered mixed signal return path signal.
    Type: Application
    Filed: July 14, 2020
    Publication date: October 29, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Johann G. GABORIAU, David M. OLIVENBAUM, Xiaofan FEI, Amar VELLANKI, Venugopal CHOUKINISHI, Gautham SIVASANKAR, Wai-Shun SHUM
  • Publication number: 20200292602
    Abstract: A method for measuring a capacitive sensor output may include applying an excitation signal to a capacitor of the capacitive sensor which causes generation of a modulated signal from a baseband signal, wherein the excitation signal is of a carrier frequency which is higher than frequency content of the baseband signal, demodulating the modulated signal to generate an intermediate signal representative of a capacitance of the capacitor wherein the demodulating is based, at least in part, on the excitation signal, converting the intermediate signal into a pulse-density modulated output signal with a pulse-density modulator, and shaping a noise transfer function of the pulse-density modulator to have an approximate zero at the carrier frequency.
    Type: Application
    Filed: June 2, 2020
    Publication date: September 17, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Amar VELLANKI, Zhong YOU, Johann G. GABORIAU
  • Patent number: 10727860
    Abstract: A digital delta-sigma modulator may include a loop filter having a loop filter input configured to receive an input signal and generate an intermediate signal responsive to the input signal and a multi-bit quantizer configured to quantize the intermediate signal into a quantized output signal which is fed back as an input to the loop filter. The multi-bit quantizer may further be configured to operate in at least two modes comprising: (a) a normal mode in which, for each sample of the intermediate signal, the multi-bit quantizer generates a corresponding sample having a value selected from a set of a plurality of quantization levels; and (b) a code suppression mode in which, for each sample of the intermediate signal, the multi-bit quantizer generates a corresponding sample having a value selected from a subset of the set of a plurality of quantization levels.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: July 28, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Wai-Shun Shum, Lei Zhu, Johann G. Gaboriau, Xiaofan Fei, Xin Zhao
  • Patent number: 10718801
    Abstract: A method for measuring a capacitive sensor output may include applying an excitation signal to a capacitor of the capacitive sensor which causes generation of a modulated signal from a baseband signal, wherein the excitation signal is of a carrier frequency which is higher than frequency content of the baseband signal, demodulating the modulated signal to generate an intermediate signal representative of a capacitance of the capacitor wherein the demodulating is based, at least in part, on the excitation signal, converting the intermediate signal into a pulse-density modulated output signal with a pulse-density modulator, and shaping a noise transfer function of the pulse-density modulator to have an approximate zero at the carrier frequency.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: July 21, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: Amar Vellanki, Zhong You, Johann G. Gaboriau
  • Patent number: 10701486
    Abstract: A system may include a filter configured to receive a digital audio input signal quantized at between two and 257 quantization levels and sampled at at least 500 kilohertz, the filter further configured to perform filtering on the digital audio input signal to generate a filtered digital audio input signal, the filter having a selectable variable group delay, a digital-to-analog converter configured to receive the filtered digital audio input signal and convert the filtered digital audio input signal into an equivalent analog audio input signal, and a driver configured to receive the equivalent analog audio input signal and drive an analog audio output signal to a transducer.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: June 30, 2020
    Assignee: Cirrus Logic, Inc.
    Inventors: John L. Melanson, Xiaofan Fei, Lei Zhu, Xin Zhao, Wei-Shun Shum, Leyi Yin, Ku He, Johann G. Gaboriau