Patents by Inventor Johann Steinmetz

Johann Steinmetz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8716079
    Abstract: In a replacement gate approach, a top area of a gate opening may receive a superior cross-sectional shape on the basis of a material erosion process, wherein a sacrificial material may protect sensitive materials, such as a high-k dielectric material, in the gate opening. In one illustrative embodiment, the sacrificial material may be applied after depositing a work function adjusting species in the gate opening.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: May 6, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Jens Heinrich, Fernando Koch, Johann Steinmetz
  • Patent number: 8492279
    Abstract: When forming via openings in sophisticated semiconductor devices, a silicon-containing anti-reflective coating (ARC) layer may be efficiently used for adjusting the critical dimension of the via openings by using a two-step etch process in which, in at least one of the process steps, the flow rate of a reactive gas component may be controlled to increase or reduce the resulting width of an opening in the silicon ARC layer. In this manner, the spread of critical dimensions of vias around the target value may be significantly reduced while also reducing any maintenance and rework efforts.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: July 23, 2013
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Mohammed Radwan, Johann Steinmetz
  • Publication number: 20120028472
    Abstract: When forming via openings in sophisticated semiconductor devices, a silicon-containing anti-reflective coating (ARC) layer may be efficiently used for adjusting the critical dimension of the via openings by using a two-step etch process in which, in at least one of the process steps, the flow rate of a reactive gas component may be controlled to increase or reduce the resulting width of an opening in the silicon ARC layer. In this manner, the spread of critical dimensions of vias around the target value may be significantly reduced while also reducing any maintenance and rework efforts.
    Type: Application
    Filed: June 21, 2011
    Publication date: February 2, 2012
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Mohammed Radwan, Johann Steinmetz
  • Publication number: 20120028376
    Abstract: When forming metal lines and vias in complex metallization systems of semiconductor devices, an additional control mechanism for adjusting the final critical dimension may be implemented in the last etch process for etching through the etch stop layer after having patterned the low-k dielectric material. To this end, the concentration of a polymerizing gas may be controlled in accordance with the initial critical dimension obtained after the lithography process, thereby efficiently re-adjusting the final critical dimension so as to be close to the desired target value.
    Type: Application
    Filed: June 10, 2011
    Publication date: February 2, 2012
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Mohammed Radwan, Johann Steinmetz
  • Publication number: 20110073920
    Abstract: In a replacement gate approach, a top area of a gate opening may receive a superior cross-sectional shape on the basis of a material erosion process, wherein a sacrificial material may protect sensitive materials, such as a high-k dielectric material, in the gate opening. In one illustrative embodiment, the sacrificial material may be applied after depositing a work function adjusting species in the gate opening.
    Type: Application
    Filed: September 27, 2010
    Publication date: March 31, 2011
    Inventors: Jens Heinrich, Fernando Koch, Johann Steinmetz
  • Patent number: 6916721
    Abstract: A method for fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected to the substrate on one side via a buried contact, using a hard mask with a corresponding mask opening.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: July 12, 2005
    Assignee: Infineon Technologies AG
    Inventors: Lars Heineck, Stephan Kudelka, Jörn Lützen, Hans-Peter Moll, Martin Popp, Till Schlösser, Johann Steinmetz
  • Publication number: 20040197988
    Abstract: A method for fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected to the substrate on one side via a buried contact, using a hard mask with a corresponding mask opening.
    Type: Application
    Filed: November 26, 2003
    Publication date: October 7, 2004
    Applicant: Infineon Technologies AG
    Inventors: Lars Heineck, Stephan Kudelka, Jorn Lutzen, Hans-Peter Moll, Martin Popp, Till Schlosser, Johann Steinmetz