Patents by Inventor Johann Winderl

Johann Winderl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7036216
    Abstract: An electrically conductive connection is produced between a chip and an external wiring configuration that is kept at a distance from the chip by spacers. Electrically conductive contact material is introduced into recesses in the external wiring configuration in order to produce the electrically conductive connection. This can be carried out economically, and allows a mechanically very robust electrical connection from the chip pads to the external wiring planes.
    Type: Grant
    Filed: September 23, 2002
    Date of Patent: May 2, 2006
    Assignee: Infineon Technologies AG
    Inventors: Christian Hauser, Martin Reiss, Johann Winderl
  • Patent number: 7008493
    Abstract: A method is described for applying an integrated circuit to a carrier element. In which a curable compensating layer of initially paste-like consistency is coated substantially with full coverage onto a lower contact area of the integrated circuit. Whereupon the integrated circuit is joined together, by the compensating layer, with the carrier element after a relative alignment in order then to produce an electrical connection between the integrated circuit and conductor tracks of the carrier element via electrical lines surmounting the thickness of the compensating layer. Whereupon the compensating layer is cured resulting in an increased volume of the compensating layer.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: March 7, 2006
    Assignee: Infineon Technologies AG
    Inventors: Johann Winderl, Christian Hauser, Martin Reiss
  • Patent number: 6894378
    Abstract: An electronic component with at least two stacked semiconductor chips is described. The chips are respectively mounted on a wiring board. The wiring boards are stacked one on top of the other and interconnected mechanically and electrically by soldered connections. The soldered connections extend through apertures in the wiring boards and over one or more levels of wiring boards stacked one on top of the other, with semiconductor chips mounted on these boards. A method for producing the electronic component is also described.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: May 17, 2005
    Assignee: Infineon Technologies AG
    Inventor: Johann Winderl
  • Patent number: 6891252
    Abstract: An electronic component includes a semiconductor chip which has an active upper side and a passive rear side. The semiconductor chip is surrounded by a sawn edge. This edge of semiconductor material has profile-sawn contours. The profile-sawn contours are surrounded by a plastics composition forming an edge of plastic. The plastics composition is in form-locking engagement with the profile-sawn contours. A method of producing a component of this type is also provided.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: May 10, 2005
    Assignee: Infineon Technologies AG
    Inventors: Johann Winderl, Martin Neumayer
  • Publication number: 20040074585
    Abstract: A method is described for applying an integrated circuit to a carrier element. In which a curable compensating layer of initially paste-like consistency is coated substantially with full coverage onto a lower contact area of the integrated circuit. Whereupon the integrated circuit is joined together, by the compensating layer, with the carrier element after a relative alignment in order then to produce an electrical connection between the integrated circuit and conductor tracks of the carrier element via electrical lines surmounting the thickness of the compensating layer. Whereupon the compensating layer is cured resulting in an increased volume of the compensating layer.
    Type: Application
    Filed: October 14, 2003
    Publication date: April 22, 2004
    Applicant: Infineon Technologies AG
    Inventors: Johann Winderl, Christian Hauser, Martin Reiss
  • Patent number: 6664648
    Abstract: A method and an apparatus are described for applying an integrated circuit to a carrier element. In which a curable compensating layer of initially paste-like consistency is coated substantially with full coverage onto a lower contact area of the integrated circuit. Whereupon the integrated circuit is joined together, by the compensating layer, with the carrier element after a relative alignment in order then to produce an electrical connection between the integrated circuit and conductor tracks of the carrier element via electrical lines surmounting the thickness of the compensating layer. Whereupon the compensating layer is cured resulting in an increased volume of the compensating layer.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: December 16, 2003
    Assignee: Infineon Technologies AG
    Inventors: Johann Winderl, Christian Hauser, Martin Reiss
  • Patent number: 6614100
    Abstract: The lead frame has a spring element, which can be compressed during the injection molding of the package by an injection mold. The resultant resilience has the effect that a contact surface of the lead is pressed against an inside wall of the injection mold. The biasing of the contact surface against the inside wall prevents polymer flash from forming on the contact surface. Also, the spring element fixes the lead during the injection operation and anchors the lead in the completed package. Hold-down pins within the injection mold are thus obviated.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: September 2, 2003
    Assignee: Infineon Technologies AG
    Inventors: Christian Hauser, Helge Schmidt, Johann Winderl
  • Publication number: 20030066188
    Abstract: An electrically conductive connection is produced between a chip and an external wiring configuration that is kept at a distance from the chip by spacers. Electrically conductive contact material is introduced into recesses in the external wiring configuration in order to produce the electrically conductive connection. This can be carried out economically, and allows a mechanically very robust electrical connection from the chip pads to the external wiring planes.
    Type: Application
    Filed: September 23, 2002
    Publication date: April 10, 2003
    Inventors: Christian Hauser, Martin Reiss, Johann Winderl
  • Patent number: 6534345
    Abstract: In order to mount a semiconductor chip on a carrier layer, consolidated filler material is applied between the semiconductor chip and the carrier layer. The filler material is sucked, under the application of a partial vacuum, from at least one edge section of the semiconductor chip to at least one other edge section of the semiconductor chip. As a result, a package is provided in which the filler material is essentially free of air inclusions.
    Type: Grant
    Filed: February 28, 2000
    Date of Patent: March 18, 2003
    Assignee: Infineon Technologies AG
    Inventors: Simon Muff, Jens Pohl, Johann Winderl
  • Patent number: 6525416
    Abstract: An electronic device is described that has a sheet strip for packaging bonding wire connections of the electronic device and a method for producing it. To that end, the sheet strip, has at least two preformed, opposite edge regions which cover the edge regions of the bonding channel in an overlapping manner. Furthermore, the sheet strip has a preformed central region situated between the edge regions, which central region has a bulge and thickened portion and has two convexly curved contour lines in cross section.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: February 25, 2003
    Assignee: Infineon Technologies AG
    Inventors: Christian Hauser, Johann Winderl, Martin Reiss
  • Patent number: 6521988
    Abstract: The invention relates to a device and a method for packaging electronic components (11) having semiconductor chips (5) by means of a mounting frame (1), which is additionally provided with a plastic grid (6) that is disposed on a plastic intermediate substrate (2), which surrounds each semiconductor chip (5) in framelike fashion and which for packaging the plurality of semiconductor chips (5) with a plastic casting composition (7) between semiconductor chips (5) and the plastic grid (6).
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: February 18, 2003
    Assignee: Infineon Technologies AG
    Inventors: Christian Hauser, Johann Winderl, Jens Pohl
  • Patent number: 6486538
    Abstract: A chip carrier made of a non-metallic material has conductor tracks applied thereon for producing an external, two-dimensional connection configuration for electronic circuit chips. The chip carrier has a multiplicity of chip mounting locations and first cutouts disposed in such a way that at least one first cutout is adjacent each of the chip mounting locations. A second, channel-like cutout in the chip carrier leads from each chip mounting location to a first cutout adjacent the chip mounting location.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: November 26, 2002
    Assignee: Infineon Technologies AG
    Inventors: Martin Reiss, Johann Winderl
  • Publication number: 20020167078
    Abstract: An electronic component includes a semiconductor chip which has an active upper side and a passive rear side. The semiconductor chip is surrounded by a sawn edge. This edge of semiconductor material has profile-sawn contours. The profile-sawn contours are surrounded by a plastics composition forming an edge of plastic. The plastics composition is in form-locking engagement with the profile-sawn contours. A method of producing a component of this type is also provided.
    Type: Application
    Filed: February 20, 2002
    Publication date: November 14, 2002
    Inventors: Johann Winderl, Martin Neumayer
  • Publication number: 20020121687
    Abstract: An electronic component with at least two stacked semiconductor chips is described. The chips are respectively mounted on a wiring board. The wiring boards are stacked one on top of the other and interconnected mechanically and electrically by soldered connections. The soldered connections extend through apertures in the wiring boards and over one or more levels of wiring boards stacked one on top of the other, with semiconductor chips mounted on these boards. A method for producing the electronic component is also described.
    Type: Application
    Filed: March 4, 2002
    Publication date: September 5, 2002
    Inventor: Johann Winderl
  • Patent number: 6430809
    Abstract: A method for bonding conductors onto semiconductor components is disclosed, where an opening is provided in an insulation layer on a semiconductor component. At least one conductor extends across the opening, where the conductor is bonded onto the semiconductor component by a bonding tool, which bends the conductor in the region of the opening toward the semiconductor component. Prior to the bonding, the conductor is severed in the region of the opening.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: August 13, 2002
    Assignee: Infineon Technologies AG
    Inventors: Monika Bauer, Klemens Ferstl, Jens Pohl, Johann Winderl
  • Patent number: 6429537
    Abstract: A semiconductor component includes a semiconductor chip having contact pads on its main face, and a wiring foil, in which are recesses for the contact pads, applied to the main face. The foil has conductor tracks on a side facing away from the main side. The conductor tracks connect the contact pads to solder contacts. The contact pads located in the recess are electrically connected via wire connections to adjacent conductor track ends. Each wire connection is surrounded with a sealing compound of a first and a second layer. A method for manufacturing a semiconductor component includes applying wiring foil to a main side of the chip, producing the wire connection between contact pads and adjacent conductor track ends, applying sealing compound to locations on the recess to completely cover the wire connection with the sealing compound, and only curing the surface of the sealing compound.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: August 6, 2002
    Assignee: Infineon Technologies AG
    Inventors: Christian Hauser, Martin Neumayer, Johann Winderl, Achim Neu, Martin Reiss
  • Publication number: 20020041017
    Abstract: An electronic device is described that has a sheet strip for packaging bonding wire connections of the electronic device and a method for producing it. To that end, the sheet strip, has at least two preformed, opposite edge regions which cover the edge regions of the bonding channel in an overlapping manner. Furthermore, the sheet strip has a preformed central region situated between the edge regions, which central region has a bulge and thickened portion and has two convexly curved contour lines in cross section.
    Type: Application
    Filed: October 4, 2001
    Publication date: April 11, 2002
    Inventors: Christian Hauser, Johann Winderl, Martin Reiss
  • Patent number: 6364751
    Abstract: Semiconductor components, which each include at least one semiconductor chip mounted on a common carrier substrate, are singled. The separation is effected by severing of the carrier substrate. The carrier substrate is thereby bent at least in that area of the carrier substrate which is to be severed. The severing takes place beginning from the convexly curved surface of the carrier substrate. In addition, the invention describes a singling device for separating semiconductor components.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: April 2, 2002
    Assignee: Infineon Technologies AG
    Inventors: Jens Pohl, Oliver Wutz, Johann Winderl
  • Publication number: 20010045641
    Abstract: The invention relates to a device and a method for packaging electronic components (11) having semiconductor chips (5) by means of a mounting frame (1), which is additionally provided with a plastic grid (6) that is disposed on a plastic intermediate substrate (2), which surrounds each semiconductor chip (5) in framelike fashion and which for packaging the plurality of semiconductor chips (5) with a plastic casting composition (7) between semiconductor chips (5) and the plastic grid (6).
    Type: Application
    Filed: June 8, 2001
    Publication date: November 29, 2001
    Inventors: Christian Hauser, Johann Winderl, Jens Pohl
  • Publication number: 20010036720
    Abstract: A semiconductor component includes a semiconductor chip having contact pads on its main face, and a wiring foil, in which there are recesses for the contact pads, applied to the main face. The foil has conductor tracks on a side facing away from the main side. The conductor tracks connect the contact pads to solder contacts. The contact pads located in the recess are electrically connected via wire connections to adjacent conductor track ends. Each wire connection is surrounded with a sealing compound composed of a first and a second layer. A method for manufacturing a semiconductor component includes applying the wiring foil to the first main side of the chip, producing the wire connection between the contact pads and the adjacent conductor track ends, applying the sealing compound to locations on the recess such that the wire connection is completely covered with the sealing compound, and only curing the surface of the sealing compound.
    Type: Application
    Filed: March 23, 2001
    Publication date: November 1, 2001
    Inventors: Christian Hauser, Martin Neumayer, Johann Winderl, Achim Neu, Martin Reiss