Abstract: In order to use a digital oscillator to generate a target frequency ZT with a "high" or "low" level constant in time from a working clock by variable division by a first division factor, two divider circuits which can be respectively triggered by the positive or the negative edges of a working clock, and to which a control word can be directed alternately by means of a first controlled switch, and which are connected on their output sides to a second controlled switch to obtain a clock pulse. To that end each divider circuit has a logic module which detects the occurrence of the edge of the control word and stores this event, with this event triggering a division by a second division factor.