Abstract: A sensor for contactlessly detecting currents, has a sensor element having a magnetic tunnel junction (MTJ), and detection circuitry, the sensor element having a resistance which varies with the magnetic field, and the detection circuitry is arranged to detect a tunnel current flowing through the tunnel junction. The sensor element may share an MTJ stack with memory elements. Also it can provide easy integration with next generation CMOS processes, including MRAM technology, be more compact, and use less power. Solutions for increasing sensitivity of the sensor, such as providing a flux concentrator, and for generating higher magnetic fields with a same current, such as forming L-shaped conductor elements, are given. The greater sensitivity enables less post processing to be used, to save power for applications such as mobile devices. Applications include current sensors, built-in current sensors, and IDDQ and IDDT testing, even for next generation CMOS processes.

Abstract: A sensor for contactlessly detecting currents, has a sensor element having a magnetic tunnel junction (MTJ), and detection circuitry, the sensor element having a resistance which varies with the magnetic field, and the detection circuitry is arranged to detect a tunnel current flowing through the tunnel junction. The sensor element may share an MTJ stack with memory elements. Also it can provide easy integration with next generation CMOS processes, including MRAM technology, be more compact, and use less power. Solutions for increasing sensitivity of the sensor, such as providing a flux concentrator, and for generating higher magnetic fields with a same current, such as forming L-shaped conductor elements, are given. The greater sensitivity enables less post processing to be used, to save power for applications such as mobile devices. Applications include current sensors, built-in current sensors, and IDDQ and IDDT testing, even for next generation CMOS processes.

Abstract: An integrated circuit assembly contains a carrier and a semi-conductor integrated circuit chip 10. A current path on the carrier supplies power to power supply connection of the chip. A magnetic field sensor is provided on the carrier in a vicinity of the current path, for sensing a magnetic field generated by a current through the current path. The assembly contains test-accessible electronic interface to the magnetic field sensor, for testing presence of the current. Preferably the sensors are integrated on the carrier by depositing magneto resistive material and patterning the material so as to provide sensors in the vicinity of current paths. Also preferably, the carrier is an interposer 12 with connecting wiring, which is packaged with one or more integrated circuit chips before mounting the interposer on a printed circuit board 19.

Abstract: Power supply connections to an integrated circuit are tested. The power supply connections are connected to a power supply conductor in the integrated circuit. For the test, combinations of current drawing circuits are switched on near the point where the power supply connection under test is connected to the power supply conductor. The current drawing circuits draw a considerable current, so as to cause a detectable voltage drop over the power supply connection, if this connection is operational. Different subsets of the current drawing circuits are activated successively. To prevent that all of the current drawing circuits are switched on at the same time by error, activation of each subset is controlled by a signal indicative of completion of activation of the preceding subset. A respective signal line is provided for each subset, to provide the signal for the subset.

Abstract: Integrated circuit with a test interface for testing a conductive connection between a supply pad and a supply of a functional block in the integrated circuit. A current test circuit has test inputs coupled to a first and a second point along the conductive connection, for comparing a voltage across the test inputs with a threshold. The current test circuit contains a threshold shifting circuit for shifting the threshold to a shifted value dependent on a voltage across the test inputs when the threshold shifting circuit is active. Testing is executed in two steps, making the threshold shifting circuit active when a first voltage is applied across test inputs and comparing a second voltage at the test input with the shifted threshold. One of the first and second voltage is a voltage drop across the connection when the integrated circuit is set to draw current along a connection, the other one of the first and second voltage is a reference voltage.

Abstract: An integrated circuit assembly contains a carrier and a semi-conductor integrated circuit chip 10. A current path on the carrier supplies power to power supply connection of the chip. A magnetic field sensor is provided on the carrier in a vicinity of the current path, for sensing a magnetic field generated by a current through the current path. The assembly contains test-accessible electronic interface to the magnetic field sensor, for testing presence of the current. Preferably the sensors are integrated on the carrier by depositing magneto resistive material and patterning the material so as to provide sensors in the vicinity of current paths. Also preferably, the carrier is an interposer 12 with connecting wiring, which is packaged with one or more integrated circuit chips before mounting the interposer on a printed circuit board 19.

Abstract: Power supply connections to an integrated circuit are tested. The power supply connections are connected to a power supply conductor in the integrated circuit. For the test, combinations of current drawing circuits are switched on near the point where the power supply connection under test is connected to the power supply conductor. The current drawing circuits draw a considerable current, so as to cause a detectable voltage drop over the power supply connection, if this connection is operational. Different subsets of the current drawing circuits are activated successively. To prevent that all of the current drawing circuits are switched on at the same time by error, activation of each subset is controlled by a signal indicative of completion of activation of the preceding subset. A respective signal line is provided for each subset, to provide the signal for the subset.

Abstract: The invention relates to a method of testing interconnections in integrated circuit (IC) assemblies. Hereto, a test signal is applied to an IC pin (110) providing an input terminal to the interconnection. In known methods, such as the boundary-scan method, a response signal is measured on an output terminal of the interconnection, provided by a further IC pin. According to the invention, however, a response signal is evaluated which is generated on the same terminal (110) as to which the test signal is applied. This has the advantage that the method of the invention can be applied when only one end of the interconnect to be tested can be supplied with appropriate test hardware. The method is particularly suited for testing a capacitance (195) between an IC pin (110) and a supply line, e.g. a ground line.

Abstract: Integrated circuit with a test interface for testing a conductive connection between a supply pad and a supply of a functional block in the integrated circuit. A current test circuit has test inputs coupled to a first and a second point along the conductive connection, for comparing a voltage across the test inputs with a threshold. The current test circuit contains a threshold shifting circuit for shifting the threshold to a shifted value dependent on a voltage across the test inputs when the threshold shifting circuit is active. Testing is executed in two steps, making the threshold shifting circuit active when a first voltage is applied across test inputs and comparing a second voltage at the test input with the shifted threshold. One of the first and second voltage is a voltage drop across the connection when the integrated circuit is set to draw current along said connection, the other one of the first and second voltage is a reference voltage.

Abstract: The invention relates to a method of testing interconnections in integrated circuit (IC) assemblies. Hereto, a test signal is applied to an IC pin (110) providing an input terminal to the interconnection. In known methods, such as the boundary-scan method, a response signal is measured on an output terminal of the interconnection, provided by a further IC pin. According to the invention, however, a response signal is evaluated which is generated on the same terminal (110) as to which the test signal is applied. This has the advantage that the method of the invention can be applied when only one end of the interconnect to be tested can be supplied with appropriate test hardware. The method is particularly suited for testing a capacitance (195) between an IC pin (110) and a supply line, e.g. a ground line.

Abstract: An integrated circuit includes a sensor which is arranged in the vicinity of a conductor in the circuit and is capable of measuring the current through the conductor. This sensor, for example constructed as a coil, is capable of determining whether a connection which includes the conductor is in order. It can thus be tested notably whether the possibly multiple supply connection of the integrated circuit is appropriately connected to an external connection terminal.

Abstract: A testable circuit comprises a signal path having a time-dependent response behavior (for example, a high-pass filter behavior). The signal path is tested for faults. To this end, the circuit is switched to a test mode in which the signal path is isolated from other signal paths. Subsequently, a test signal containing a signal transition is applied to the input of the signal path and it is tested whether the signal on the output of the signal path at any instant exceeds a threshold level during a predetermined time interval after the transition. The result is loaded into a register and read from the circuit.

Abstract: A method of testing an interconnection function between two integrated circuits which are mounted on a carrier and which are interconnected by data connections, for example a printed wiring board, is disclosed. The integrated circuits are also connected to a serial bus via which test patterns and result patterns can be communicated between a test device which can be connected thereto and the respective integrated circuits. The bus of a preferred embodiment is formed by a so-called I.sup.2 C bus. In a further elaboration, this set-up can also be used for testing the internal logic circuitry of the integrated circuits. For the testing of the interconnection function, input/output cells with a parallel connection for performing the normal execution function in a transparent mode are provided. They also include series connections for communication test/result patterns by way of a shift register.

Abstract: A sensor suitable for measuring magnetic field gradients spanning very small regions has a magnetic field-sensitive element (37, 42) with a very accurately defined height and thickness (even into the nanometer range) which is perpendicular to the surface of a substrate (30, 41) so that the substrate surface may be used in aligning the element (37, 42) and is manufactured by, for example, depositing magnetic field-sensitive material (9) integrally on the surface of a substrate (5) and the walls and the bottom of a groove (8) provided therein and by removing the deposited material by means of an ion etching process with an ion beam incident at right angles to the substrate surface so that only the deposited material (10) on the walls remains.

Abstract: A sensor suitable for measuring magnetic field gradients spanning very small regions has a magnetic field-sensitive element (37, 42) with a very accurately defined height and thickness (even into the nanometer range) which is perpendicular to the surface of a substrate (30, 41) so that the substrate surface may be used in aligning the element (37, 42).

Abstract: A method of manufacturing an integrated magnetic head unit includes providing a substrate which supports a plurality of electromagnetic transducing elements connected to bonding pads. The transducing elements are then covered by a silicon plate which is arranged in good thermally-conducting relationship with the transducing elements and with a housing.

Abstract: An integrated magnetic head unit includes a housing and a substrate provided in the housing. The substrate supports a plurality of electromagnetic transducing elements including respective transmission elements which are connected to bonding pads on the substrate. A silicon plate covers the transducing elements and is arranged in a good thermally-conducting relationship with the transducing elements and with the housing. The cover plate is arranged such that the bonding pads are exposed.