Patents by Inventor Johannes Meusburger

Johannes Meusburger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for a bus interface
    Patent number: 9817782
    Abstract: In accordance with an embodiment, a method of operating a bus interface circuit includes detecting a start sequence on a plurality of input terminals, determining whether a first input terminal and a second input terminal is a data terminal and a clock terminal, respectively, or whether the first input terminal and the second terminal is a clock terminal and a data terminal, respectively. The method also includes routing the first input terminal to a data terminal and the second input terminal to a clock terminal if first input terminal and the second input terminal are determined to be a data terminal and a clock terminal, respectively, and routing the first input terminal to the clock terminal and the second input terminal to the data terminal if first input terminal and the second input terminal are determined to be a clock terminal and a data terminal, respectively.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: November 14, 2017
    Assignee: Infineon Technologies AG
    Inventors: Thomas Leitner, Johannes Meusburger, Joachim Fliesser
  • System and Method for a Bus Interface
    Publication number: 20140325103
    Abstract: In accordance with an embodiment, a method of operating a bus interface circuit includes detecting a start sequence on a plurality of input terminals, determining whether a first input terminal and a second input terminal is a data terminal and a clock terminal, respectively, or whether the first input terminal and the second terminal is a clock terminal and a data terminal, respectively. The method also includes routing the first input terminal to a data terminal and the second input terminal to a clock terminal if first input terminal and the second input terminal are determined to be a data terminal and a clock terminal, respectively, and routing the first input terminal to the clock terminal and the second input terminal to the data terminal if first input terminal and the second input terminal are determined to be a clock terminal and a data terminal, respectively.
    Type: Application
    Filed: July 7, 2014
    Publication date: October 30, 2014
    Inventors: Thomas Leitner, Johannes Meusburger, Joachim Fliesser
  • System and method for a bus interface
    Patent number: 8775714
    Abstract: In accordance with an embodiment, a method of operating a bus interface circuit includes detecting a start sequence on a plurality of input terminals, determining whether a first input terminal and a second input terminal is a data terminal and a clock terminal, respectively, or whether the first input terminal and the second terminal is a clock terminal and a data terminal, respectively. The method also includes routing the first input terminal to a data terminal and the second input terminal to a clock terminal if first input terminal and the second input terminal are determined to be a data terminal and a clock terminal, respectively, and routing the first input terminal to the clock terminal and the second input terminal to the data terminal if first input terminal and the second input terminal are determined to be a clock terminal and a data terminal, respectively.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: July 8, 2014
    Assignee: Infineon Technologies AG
    Inventors: Thomas Leitner, Johannes Meusburger, Joachim Fliesser
  • SYSTEM AND METHOD FOR A BUS INTERFACE
    Publication number: 20130198427
    Abstract: In accordance with an embodiment, a method of operating a bus interface circuit includes detecting a start sequence on a plurality of input terminals, determining whether a first input terminal and a second input terminal is a data terminal and a clock terminal, respectively, or whether the first input terminal and the second terminal is a clock terminal and a data terminal, respectively. The method also includes routing the first input terminal to a data terminal and the second input terminal to a clock terminal if first input terminal and the second input terminal are determined to be a data terminal and a clock terminal, respectively, and routing the first input terminal to the clock terminal and the second input terminal to the data terminal if first input terminal and the second input terminal are determined to be a clock terminal and a data terminal, respectively.
    Type: Application
    Filed: January 30, 2012
    Publication date: August 1, 2013
    Applicant: Infineon Technologies AG
    Inventors: Thomas Leitner, Johannes Meusburger, Joachim Fliesser