Abstract: An arrangement for reading information from a record carrier, such as in a HDD, include a read head (Rmr1), an amplifier (74) for amplifying the signal read by the read head, an equalizer (76) for equalizing the signal read by the read head, and a bit detector (80) for detecting bits in the signal read by the read head. The invention, the arrangement further comprises a DC correction unit (78) for subtracting a correction value from an input signal in response to an error signal so as to obtain a DC corrected output signal. The bit detector (80) detects a sequence of bits based in the DC corrected output signal. Further, an error signal generating unit (82,83,85) is present for generating the error signal in response to the DC corrected output signal and the sequence.

Abstract: An arrangement is disclosed for reading information from a record carrier. The arrangement comprises a read head having at least one magneto-resistive element (Rmr), a first transistor (Tr1) and a second transistor (Tr2). The base of the first transistor (Tr1) is coupled to the emitter of the second transistor (Tr2) via a first capacitor (6). The base of the second transistor (Tr2) is coupled to the emitter of the first transistor (Tr1) via a second capacitor (8). The arrangement further comprises a non-linear transconductance amplifier (14) having first and second inputs coupled to the output terminals (10,12) of the arrangement, and having and inverting and non-inverting outputs coupled to the bases of the first and second transistor.

Abstract: A device for write precompensation of data signals to be recorded on a magnetic medium, has an input for receiving input data signals and an output for supplying the output signals to be recorded, at least a plurality of the signal transitions in these output data signals being delayed with respect to the corresponding signal transitions in the input data signal, the signal path between the input and the output including a series arrangement of a filter circuit and a hysteresis circuit, the hysteresis circuit receiving the output signal of the filter circuit and supplying a binary signal as its output signal. This write precompensation device simply enables allowance to be made for the influence of a large number of preceding symbol values on a transition to be recorded. When the device is combined with a known write compensation device it suffices to use a simple filter.

Abstract: A method and a device in which information is written on a medium and is read out, and which establishes whether the information read is sufficiently reliable, and in which so-called erasure information is used to establish the influence of media defects and other imperfections on the occurrence of errors in a transmission system. The medium is, for example, a hard disk containing one or more bad spots whose location can be accurately detected. The implementation of the method makes accurate and fast computation of the bit error rate possible.

Abstract: A fast acquisition method is described that combines timing, gain and, if required, equalizer acquisition in one go with word synchronization. At the heart of the method is a preamble that begins with a repetition of identical words P whose length matches the code-word length. Preferably the method ends with a frame-sync word based on the bit-by-bit inverse of P. Main attractions of the technique are simplicity, speed, and robustness.

Abstract: A device for write precompensation of data signals to be recorded on a magnetic medium, which device has an input for receiving input data signals and an output for supplying output signals to be recorded, an integrator/limiter circuit which receives the input data signals and which supplies an output signal which is in synchronism with the data signal and whose amplitude varies substantially linearly as a function of time at positions where a signal transition appears in the data signal, which amplitude is limited within a data symbol interval; an adjustable filter which receives the input signals and supplies an output signal whose instantaneous values depend on the pattern of preceding and future signal transitions in the data signal; and a comparator circuit which through comparison of the output signal of the integrator/limiter circuit and the output signal of the filter produces the output signal in which at least some signal transitions of the input data signal can be shifted in time.

Abstract: In a transmission system digital symbols are transmitted by a transmitter via a channel to a receiver. The receiver comprises a first detector and a second detector with different decision levels. In the case of an unreliable input signal of the detectors, the sequences of detected symbols at the outputs of the detectors may differ. By checking the sequences of digital symbols on code rule violations, the most likely sequence of detected symbols can be selected by a selector and passed to the output.

Abstract: An unreliability detector apparatus for generating an unreliable decision signal in response to an input signal. An input terminal receives the input signal, a first comparator unit compares the input signal with a first threshold value and a second comparator unit compares the input signal with a second threshold value. A processor is provided for carrying out a function for determining whether a curve in an X-Y plane has at least one point in common with a predetermined line in the X-Y plane. The curve in the X-Y plane is obtained by plotting time equivalent signals values of the first and second comparator output signals along the Y- and X-axis respectively of the X-Y plane, while the predetermined line in the X-Y plane is formed by a first line interconnecting a first fixed point and a second fixed point and in which half plane a third fixed point is located. The three fixed points are obtained by plotting combinations of a first through a fourth signal value along the X- and Y-axis.

Abstract: A digital information signal is channel encoded into a channel signal. Data sequences in the channel encoded information signal that give rise to an analog signal, upon reproduction or reception, with a single frequency component at f.sub.b M, are limited in length. M being an integer constant larger than 2 and f.sub.b being the bit frequency in the channel encoded information signal.

Abstract: A receiver for transmitted signals which represent digital symbol values includes a low-pass filter to minimize transmission noise by reducing the receiver bandwidth. However, this creates pulse distortion which can cause intersymbol interference when the filtered signal is supplied to a symbol detector. Such interference is minimized by the inclusion of a feedback loop between the output of the symbol detector and the input to the filter, in which a detected symbol is multiplied by correction factor and supplied to a subtractor where it is subtracted from the signal to be filtered. The result of the subtraction is supplied to the filter. The noise reduction filter is thus also used for matching the intersymbol distortion characteristic of a filtered detected symbol to the intersymbol distortion characteristic of a filtered received signal pulse.

Abstract: In a digital symbol receiver it is necessary to generate a clock signal with a correct frequency and phase, so that decisions a.sub.k about the value of transmitted symbols a.sub.k can be made at the right detection instants. A simple method of obtaining the desired clock signal is to adjust a VCO by means of a control signal obtained from the correlation of a detection signal r(t) with the detected symbols a.sub.k filtered by a symbol filter. The symbol filter may comprise a cascade connection of a differentiator and a filter which has a transfer function which is an estimate of the transfer function of a channel which supplies the transmitted symbols.

Abstract: In a digital transmission system including a transmitter (2) coupled via a channel (4) to a receiver (6) a detection signal r.sub.k is compared with a number of reference values to determine the destination symbols a.sub.k. Since the size of the received signal r.sub.k is not known in advance, the ratio between the detection signal and the reference values is to be determined by an adapting circuit (16) on the basis of the received signal and the decisions made. The problem may then occur that as a result of an initially erroneous value of the ratio between detection signal and reference values not a correct adaptation is made. By recognizing such a situation because specific values of the symbols a.sub.k are lacking, in such a situation said ratio can be brought to such a value by the correction circuit (18) that all the values of a.sub.k again occur.

Abstract: In a data receiver (6) a detection means (10) is used for determining a symbol value from the received signal. For reducing the effect of cyclostationary noise signals, a number of simultaneously operating detectors (12, 14) are used which derive a sequence of symbols from the input signal sampled at different instants. On the basis of a reliability measure simultaneously derived by the detectors, the symbol sequence whose associated reliability measure expresses the greatest reliability is conveyed to the output of the receiver with the aid of selection means.

Abstract: Viterbi detector for a channel having a memory length 1, where no more than two survivors with an associated difference metric are updated. In the prior-art Viterbi detector of this type the new difference metric is from the previous difference metric by use of a saturation function. If the channel parameters differ from the values assumed for the calculation of the difference metric, the performance of the prior-art detector will rapidly degrade. In the detector according to the invention the new difference metric is derived from a combination of the saturation function of the previous difference metric and a correction signal which is a measure for the channel parameter difference.

Abstract: A data transmission system wherein the data symbols to be transmitted are divided into two groups, for example odd and even, and each data symbol in one group is represented by a signal element which differs from the signal element used to represent each data symbol in the other group. An example of such encoding is the quadra-phase code. The transmitted signal is a summation of the signal elements of both groups. At the receiver the received signal is sampled at a first and a second sampling instant for every two successive signal elements, and from the sample values decisions are made as to the symbol values represented thereby. This requires that the sampling instants accurately correspond to the two groups of signal elements. To achieve such timing control the receiver includes a phase detector for deriving an error signal representing deviation between actual and correct sampling instants, and the actual sampling instants are adapted to minimize the error signal.

Abstract: For avoiding error propagation as a result of decision feedback equalization, the data to be transmitted are coded with a coder 2 which has a transfer function substantially inverse to the transfer function of the channel 4. Consequently, instantaneous decisions about the received symbol may be made at the receiver 6 without intersymbol interference causing a disturbance. If the channel transfer function differs from the transfer function of the precoder 2, intersymbol interference will again occur, so that the symbol error rate will increase. In order to restrict this increase of the symbol error rate as much as possible, the receiver comprises a cascaded circuit of an adaptive filter 18 which has an inverse transfer function to that of the channel and a decoder 21 which has an inverse transfer function to that of the precoder 2.

Abstract: For reducing the complexity of adaptive systems such as equalizers, echo cancellers and clock recovery systems, errors are often determined only once per n samples, where n is an integer. If the input signal of such an adaptive system comprises cyclostationary components, it may occur that the adaptive system does not converge to a desired value. By selecting n in such a way that the greatest common divisor of n and the cyclostationary period m of the input signal is equal to 1, convergence of the adaptive system is ensured.

Abstract: Data receiver in which a received signal is sampled and converted to a digital signal by an analog-to-digital converter (1), the signal samples being detected by a Viterbi detector (3). In order to have the sampling effected at the correct instants, these sampling instants are derived from the received symbol values and an error signal which is a metric for a difference between an expected and a recent signal sample. This is effected by a multiplier 4, a low-pass filter 5 and a control signal for a controllable clock oscillator (6). For utilizing the energy in a precursor of the received signal, an error signal e(k-1) is used which is obtained at a later instant than the instant at which a provisional decision about the relevant data symbol a(k-2) is made.

Abstract: In a receiver of quadraphase modulation signals, a receiver of quadraphase modulation signals which is provided with two kinds of equalizers being different in each sine and cosine phases, together with an equalizer extracting a clock signal.

Abstract: A detector circuit assigns binary values to a series of sample values taken periodically from a waveform representing a binary pattern of marks on a record carrier, the pattern of marks nominally having a minimum run length of more than one sampling period. The detector determines whether the pattern is subject to a first or a second type of systematic error, the first type causing the marks on the record carrier to be systematically too short and the second type causing them to be too long. For each sample value a.sub.k, a plurality of successive sample values (a.sub.k-1, a.sub.k+1) which include the sample value a.sub.k are combined to generate one or more combined sample values. Each such combined sample value is compared with a threshold value (u'/u"), and in accordance with the results of such comparisons a binary value (A.sub.k ') is assigned to the sample a.sub.k using a logic relationship dependent on which type of systematic error is present. The detector may be included in an optical disc player.