Abstract: A phase locked loop frequency synthesizer with jitter compensation having a tapped delay line for compensating the jitter prior to passing a signal subject to jitter through a non-linearity; and, a ?? modulator for generating, or a storing element for pre-generated storing, of a fractional pattern representing fractional weighting of a plurality of integer divisors, wherein the fractional pattern identifies one integer divisor, out of the plurality of integer divisors, at a time to be active.

Abstract: The present invention relates to sigma-delta modulators, ?? modulators, and phase locked loops. Especially, it relates to jitter compensation in ??-controlled fractional-N frequency synthesizers. Jitter compensation is introduced by means of a variable delay line.

Abstract: A phase locked loop (PLL) circuit (1) comprising a loop input (11); a phase detector section (2) for detecting a phase difference between an input signal and a reference signal. The phase detector section (2) has a detector input connected to the loop input, a reference input and a detector output for outputting a signal related to the phase difference. A controlled oscillator (4) is connected with an input to the detector output and an oscillator output is connected to a loop output (12). The PLL has a feedback circuit which connects the oscillator output to the reference input, wherein the feedback circuit includes a device (7;71-74) having a transfer function with at least one zero.

Abstract: An amplifier circuit comprising a transconductor device connected to a phase shifter section. The phase shifter section has an adjustable phase shift and an impedance at least partially dependent of the frequency of an input signal. In use, the adjustable phase shift is adjusted to have substantially the opposite value of a phase shift of the transconductor device. In an embodiment, the phase shifter section comprises a capacitor device and an adjustable resistor device which comprises an amplifier device with an input contact for receiving a resistance control signal; a first output contact connected to the capacitor devices and a second output contact connected to the transconductor device. The amplifier circuit further comprises a control device for providing said resistance control signal to the input contact of the amplifier device.

Abstract: An amplifier circuit comprising a transconductor device connected to a phase shifter section. The phase shifter section has an adjustable phase shift and an impedance at least partially dependent of the frequency of an input signal. In use, the adjustable phase shift is adjusted to have substantially the opposite value of a phase shift of the transconductor device. In an embodiment, the phase shifter section comprises a capacitor device and an adjustable resistor device which comprises an amplifier device with an input contact for receiving a resistance control signal; a first output contact connected to the capacitor devices and a second output contact connected to the transconductor device. The amplifier circuit further comprises a control device for providing said resistance control signal to the input contact of the amplifier device.