Abstract: An integrated circuit having a plurality of processing modules (M, S) and an interconnect means (N) for coupling said plurality of processing modules (M, S) and for enabling a packet based communication based on transactions between said plurality of processing modules (M, S) is provided. Each packet comprises a first predetermined number of subsequent words each having a second predetermined number of bits. A first of said plurality of processing modules (M) issues a transaction by sending at least one packet over said interconnect means (N) to a second of said plurality of processing modules (S). The integrated circuit further comprises at least one packet inspecting unit (PIU) for inspecting bits of said at least one packet to determine bits not required for said issued transaction and for matching said not required bits of said at least one inspected packet with other bits of the same packet.

Abstract: The invention provides a router which can be deployed in a network on an integrated circuit. The router is capable of processing input data belonging to multiple traffic classes. The router can further guarantee, under admissible traffic, that all input data are processed and output adequately at an acceptable cost. The invention relies on the perception that the problem of contention is constituted by two more specific problems: input contention and output contention. The problem of input contention does not occur anymore, because the switch comprised in the router is designed such that it can serve multiple queues coupled to input ports simultaneously. The problem of starvation, caused by a continuous preference of high priority traffic to low priority traffic, is solved by allowing to serve queues containing data from low priority traffic classes simultaneously with queues containing data from high priority traffic classes.