Patents by Inventor John A. Adamik

John A. Adamik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7842931
    Abstract: An extraction electrode manipulator system, comprising an ion source, a suppression electrode and a ground electrode, wherein the two electrode are supported by coaxially arranged two water cooled support tubes. A high voltage insulator ring is located on the other end of the coaxial support tube system to act as a mechanical support of the inner tube and also as a high voltage vacuum feedthrough to prevent sputtering and coating of the insulating surface.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: November 30, 2010
    Assignee: Axcelis Technologies, Inc.
    Inventors: Shu Satoh, John Adamik, Manny Sieradzki
  • Publication number: 20100072402
    Abstract: An extraction electrode manipulator system, comprising an ion source, a suppression electrode and a ground electrode, wherein the two electrode are supported by coaxially arranged two water cooled support tubes. A high voltage insulator ring is located on the other end of the coaxial support tube system to act as a mechanical support of the inner tube and also as a high voltage vacuum feedthrough to prevent sputtering and coating of the insulating surface.
    Type: Application
    Filed: September 25, 2008
    Publication date: March 25, 2010
    Applicant: Axcelis Technologies, Inc.
    Inventors: Shu Satoh, John Adamik, Manny Sieradzki
  • Patent number: 6167834
    Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer.
    Type: Grant
    Filed: August 13, 1992
    Date of Patent: January 2, 2001
    Assignee: Applied Materials, Inc.
    Inventors: David Nin-Kou Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan
  • Patent number: 5871811
    Abstract: A method for protecting a selected area of a substrate against deposition on the selected area. The method includes the steps of flowing a process gas into a substrate processing chamber and flowing a purge gas to the selected area of the substrate to prevent the process gas from contacting the selected area or minimize contact between the process gas and the selected area. In various embodiments the selected area is a backside periphery of the substrate or the edge of the substrate. Also in these embodiments, the process gas is flowed into a deposition zone in order to deposit a thin film layer over an upper surface of the substrate, and a flow of the process and purge gas is established such that the process gas flows radically across the upper surface of the substrate, combines with the purge gas near an edge of the substrate and exits the processing chamber through an exhaust system.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 16, 1999
    Assignee: Applied Materials, Inc.
    Inventors: David Nin-Kou Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan
  • Patent number: 5755886
    Abstract: A substrate processing reactor capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning and other substrate processing operations all of which can either be performed separately or as part of in-situ multiple step processing. The reactor incorporates a uniform radial gas pumping system which enables uniform reactant gas flow across the wafer. Also included are upper and lower purge gas dispersers. The upper purge gas disperser directs purge gas flow downwardly toward the periphery of the wafer while the lower gas disperser directs purge gas across the backside of the wafer. The radial pumping gas system and purge gas dispersers sweep radially away from the wafer to prevent deposition external to the wafer and keep the chamber clean.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 26, 1998
    Assignee: Applied Materials, Inc.
    Inventors: David Nin-Kou Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan
  • Patent number: 5362526
    Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer.
    Type: Grant
    Filed: January 23, 1991
    Date of Patent: November 8, 1994
    Assignee: Applied Materials, Inc.
    Inventors: David N. Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan
  • Patent number: 5354715
    Abstract: A high pressure, high throughout, single wafer semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature process for forming a highly conformal layer of silicon dioxide from a plasma of TEOS, oxygen and ozone is also disclosed. This layer can be planarized using an etchback process. Silicon oxide deposition and etchback can be carried out sequentially in the reactor.
    Type: Grant
    Filed: April 1, 1992
    Date of Patent: October 11, 1994
    Assignee: Applied Materials, Inc.
    Inventors: David N-K. Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan
  • Patent number: 5000113
    Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer.
    Type: Grant
    Filed: December 19, 1986
    Date of Patent: March 19, 1991
    Assignee: Applied Materials, Inc.
    Inventors: David N. Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan
  • Patent number: 4892753
    Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer.
    Type: Grant
    Filed: October 26, 1988
    Date of Patent: January 9, 1990
    Assignee: Applied Materials, Inc.
    Inventors: David N. Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan
  • Patent number: 4872947
    Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either along or in conjunction with a subsequent isotropic etch.
    Type: Grant
    Filed: October 26, 1988
    Date of Patent: October 10, 1989
    Assignee: Applied Materials, Inc.
    Inventors: David N. Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan
  • Patent number: RE36623
    Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer.
    Type: Grant
    Filed: December 2, 1996
    Date of Patent: March 21, 2000
    Assignee: Applied Materials, Inc.
    Inventors: David Nin-Kou Wang, John M. White, Kam S. Law, Cissy Leung, Salvador P. Umotoy, Kenneth S. Collins, John A. Adamik, Ilya Perlov, Dan Maydan