Patents by Inventor John A. Bayliss

John A. Bayliss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9990254
    Abstract: Techniques for data restoration are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus for data restoration. The apparatus may comprise a module to identify a missing or corrupt file. The apparatus may also comprise a module to determine a file fingerprint of the missing or corrupt file from one or more associated databases and a module to determine if one or more clients has a copy of the missing or corrupt file. The apparatus may further comprise a module to request the missing or corrupt file from one or more of the one or more clients.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: June 5, 2018
    Assignee: VERITAS TECHNOLOGIES LLC
    Inventor: Michael John Bayliss
  • Publication number: 20170270570
    Abstract: A system and method is disclosed for generating offerings for a geographic location using referrer information. A batch process may scan a group of information sources that display a point of interest to extract meta information related to the point of interest. In response to a current online display of the point of interest, one or more offerings based on the meta information may be determined and provided for display in connection with the current online display of the point of interest.
    Type: Application
    Filed: November 30, 2012
    Publication date: September 21, 2017
    Inventors: Arnold BINAS, Jordan John BAYLISS-MCCULLOCH, Michael Steven PERROW
  • Patent number: 9725153
    Abstract: An apparatus and method comprising a rack and a translation mechanism. The rack may be configured to hold components. The rack may comprise movable rack segments that are movable independently of each other. The translation mechanism may be configured to move a portion of the movable rack segments relative to another portion of the movable rack segments inside a platform such that internal access to at least a portion of the components is provided inside the platform.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: August 8, 2017
    Assignee: THE BOEING COMPANY
    Inventors: Andrew John Bayliss, Stephen T. Brown, Perry Nicholas Rea, Kevin Matthew Retz
  • Publication number: 20150294360
    Abstract: A system and method for facilitating clustering of ads and map content, the method including receiving a request associated with a target region on a map from a user device, identifying an ad for display to a user based at least in part on the received search request, determining a location associated with an ad of the one or more ads, determining a region criteria based on the location of the ad, retrieving, one or more map content items having a location meeting the determined region criteria, comparing the ad and the retrieved one or more map content items to identify a map content item associated with the same entity as the ad and providing the ad and the identified map content item to the user at the user device, wherein the map content item is displayed as a single entity with an identifier of the map content item.
    Type: Application
    Filed: June 26, 2015
    Publication date: October 15, 2015
    Inventors: Jordan John Bayliss-Mcculloch, Alexander Max Berry
  • Publication number: 20150195947
    Abstract: An apparatus and method comprising a rack and a translation mechanism. The rack may be configured to hold components. The rack may comprise movable rack segments that are movable independently of each other. The translation mechanism may be configured to move a portion of the movable rack segments relative to another portion of the movable rack segments inside a platform such that internal access to at least a portion of the components is provided inside the platform.
    Type: Application
    Filed: March 18, 2015
    Publication date: July 9, 2015
    Inventors: Andrew John Bayliss, Stephen T. Brown, Perry Nicholas Rea, Kevin Matthew Retz
  • Patent number: 8998135
    Abstract: An apparatus and method comprising a rack and a translation mechanism. The rack may be configured to hold components. The rack may comprise movable rack segments that are movable independently of each other. The translation mechanism may be configured to move a portion of the movable rack segments relative to another portion of the movable rack segments inside a platform such that internal access to at least a portion of the components is provided inside the platform.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: April 7, 2015
    Assignee: The Boeing Company
    Inventors: Andrew John Bayliss, Stephen T. Brown, Perry Nicholas Rea, Kevin Matthew Retz
  • Patent number: 8976531
    Abstract: A method and apparatus for an accessible equipment rack system. A mounting frame having a set of transport elements and a translation mechanism is connected to a translating equipment rack. The translation mechanism moves the translating equipment rack to enable access to said translating equipment rack from an exterior area.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: March 10, 2015
    Assignee: The Boeing Company
    Inventors: Andrew John Bayliss, Perry Nicholas Rea, Kevin Matthew Retz
  • Patent number: 8874599
    Abstract: A system and machine-implemented method for determining a language intent of a user submitted query is provided. A user query comprising text and a user location is received and a language usage signal based on the text of the user query is identified, wherein the language usage signal is associated with a first language. A second language associated with the user location is identified and a translation of the text of the user query from the first language to the second language is generated. A strength of the language usage signal is determined based on an amount of variation between the text of the user query and the translation of the text. When the strength of the language usage signal is greater than a predetermined threshold, an output language for the query is adjusted and results for the query are returned according to the output language.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: October 28, 2014
    Assignee: Google Inc.
    Inventors: Bruce Winston Murphy, Jordan John Bayliss-McCulloch
  • Publication number: 20140279000
    Abstract: A system and method is disclosed for automatically configure a webpage to display a geographically focused internet offering. An interactive map is configured to, when displayed in a web browser, automatically detect one or more online marketing components associated with a currently displayed webpage. On an initial display or user-repositioning of the interactive map, the map transmits a geographic location displayed on the map to the marketing components. Each marketing component then displays one or more offerings related to the displayed area of interest.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: Google Inc.
    Inventors: Arnold BINAS, Grim Hegland IVERSEN, Jordan John BAYLISS-MCCULLOCH, Michael PERROW
  • Publication number: 20130144900
    Abstract: A system and machine-implemented method for determining a language intent of a user submitted query is provided. A user query comprising text and a user location is received and a language usage signal based on the text of the user query is identified, wherein the language usage signal is associated with a first language. A second language associated with the user location is identified and a translation of the text of the user query from the first language to the second language is generated. A strength of the language usage signal is determined based on an amount of variation between the text of the user query and the translation of the text. When the strength of the language usage signal is greater than a predetermined threshold, an output language for the query is adjusted and results for the query are returned according to the output language.
    Type: Application
    Filed: February 1, 2013
    Publication date: June 6, 2013
    Inventors: Bruce Winston MURPHY, Jordan John Bayliss-Mcculloch
  • Patent number: 8386477
    Abstract: A system and machine-implemented method for determining a language intent of a user submitted query is provided. A user query comprising text is received and a location of the user based on the received user query is determined. At least one language usage signal from the text of the user query is identified. A strength of the at least one language usage signal is determined based on the received user query and the determined location of the user. When the strength of the at least one language usage signal is greater than a predetermined threshold, an output language for the query is adjusted based on the language usage signal. Results for the query are returned according to the output language.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: February 26, 2013
    Assignee: Google Inc.
    Inventors: Bruce W. Murphy, Jordan John Bayliss-McCulloch
  • Publication number: 20120170227
    Abstract: A method and apparatus for an accessible equipment rack system. A mounting frame having a set of transport elements and a translation mechanism is connected to a translating equipment rack. The translation mechanism moves the translating equipment rack to enable access to said translating equipment rack from an exterior area.
    Type: Application
    Filed: January 5, 2011
    Publication date: July 5, 2012
    Applicant: The Boeing Company
    Inventors: Andrew John Bayliss, Perry Nicholas Rea, Kevin Matthew Retz
  • Patent number: 4415969
    Abstract: An instruction translator unit which receives an instruction stream from a main memory of a microprocessor, for latching data fields, for generating microinstructions necessary to emulate the function encoded in an instruction, and for transferring the data and microinstructions to a microinstruction execution unit over an output bus. The instruction unit includes an instruction decoder (ID) which interprets the fields of received instructions and generates single forced microinstructions and starting addresses of multiple-microinstruction routines. A microinstruction sequencer (MIS) accepts the forced microinstructions and the starting addresses and places on the output bus correct microinstruction sequences necessary to execute the received instruction. The microinstruction routines are stored in a read-only memory (ROM) in the MIS. The starting addresses received from the ID are used to index into and to fetch these microinstructions from the ROM.
    Type: Grant
    Filed: February 7, 1980
    Date of Patent: November 15, 1983
    Assignee: Intel Corporation
    Inventors: John A. Bayliss, Stephen R. Colley, Roy H. Kravitz, William S. Richardson, Dorn K. Wilde, Gurdev Singh
  • Patent number: 4407016
    Abstract: A microprocessor receives addresses and data from a peripheral subsystem for use in subsequently accessing portions of the main memory of a data processing system in a controlled and protected manner. Each of the addresses is used to interrogate an associative memory to determine if the address falls within one of the subranges for a "window" on the main memory address space. If the address matches, then it is used to develop a corresponding address on the main memory address space. The data associated with the peripheral subsystem address is then passed through the interface and into the main memory at the translated memory address. Data transfer is improved by buffering blocks of data on the microprocessor. Data bytes are written into the buffer at a slower rate than data blocks are read out of the buffer and into main memory. A buffer bypass register allows single bytes of data to be transferred to a single address by bypassing the buffer.
    Type: Grant
    Filed: February 18, 1981
    Date of Patent: September 27, 1983
    Assignee: Intel Corporation
    Inventors: John A. Bayliss, Craig B. Peterson, Doran K. Wilde
  • Patent number: 4315310
    Abstract: An input/output processor architecture for providing an interface between peripheral subsystems and a generalized data processor. The interface processor enables data to be transferred between two address spaces (the generalized data processor address space and an external processor I/O address space) by mapping a portion of the I/O address space into a portion of the GDP address space. This mapping facility provides the peripheral subsystem with a "window" into the associated GDP subsystem. It accepts addresses within a certain subrange, or subranges, and translates them into references into one or more GDP data segments.A function-request facility provides a functional capability over certain objects within the GDP address space.
    Type: Grant
    Filed: September 28, 1979
    Date of Patent: February 9, 1982
    Assignee: Intel Corporation
    Inventors: John A. Bayliss, George W. Cox, Bert E. Forbes, Kevin C. Kahn
  • Patent number: 4270167
    Abstract: The data processing capacity of a practical semiconductor computer system, having both local and system buses, can be expanded both in degree of complexity and magnitude by providing a method and means for cooperatively and concurrently coprocessing digital information among a plurality of processors sharing the same local bus and collectively accessing the system bus as a system unit. In other words, a central processor has primary control and access to a local bus and may have access to a system or common bus shared among many other processors. Also sharing the local bus with the central processor is a plurality of specialized or dedicated processors which are continuously apprised of or actively monitor the internal operational status and operation then being performed by the central processor. The active monitoring of the activity of the other processors sharing the local bus distinguishes these dedicated processors from conventional direct memory accessing processors.
    Type: Grant
    Filed: June 30, 1978
    Date of Patent: May 26, 1981
    Assignee: Intel Corporation
    Inventors: Robert J. Koehler, John A. Bayliss
  • Patent number: 4063409
    Abstract: A random access memory is combined with a programmable logic array to count time pulses within an integrated circuit watch. A master oscillator drives the internal timing clocks and serves as a time standard for a timing and control circuit means which manipulates data within the random access memory. The timing and control circuit may contain a programmable read-only memory so that words stored within the random access memory may be read, and manipulated, in a selected sequence. The programmable logic array increments the word selectively read from the random access memory, compares it to a limit value and generates one or more flags according to the desired data manipulation. Words stored within the random access memory may be selectively displayed by a liquid crystal display or light emitting diode display in a selected format determined by the programmable read-only memory.
    Type: Grant
    Filed: January 5, 1976
    Date of Patent: December 20, 1977
    Assignee: Intel Corporation
    Inventor: John A. Bayliss