Patents by Inventor John A. Bradley

John A. Bradley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150250185
    Abstract: Compositions and methods of phytopathogenic fungus control are provided, the compositions and methods include a first component of dissolved organic matter (DOM) concentrate having natural organic matter of defined composition, suitable for soil, foliar, and seed coating.
    Type: Application
    Filed: September 13, 2013
    Publication date: September 10, 2015
    Inventors: Terry J. Hanson, Kenneth Scott Day, John Bradley
  • Patent number: 9117566
    Abstract: One or more insulated conductive wire assemblies are incorporated in a pressure balanced, oil-filled (PBOF) hose. Each conductive wire assembly has a pair of conductive wires each having an insulation layer, an insulating material surrounding the insulated wires, and an outer insulating layer surrounding the insulating material. The insulating material may be selected to have a dielectric constant substantially matching the dielectric constant of the oil in the PBOF hose, so that the insulated pair of conductors perform in the same way both before and after the assembly is submerged in oil in the jumper hose. One or more parameters of the conductive wire assembly are selected such that the assembly has a predetermined impedance when submerged in oil within the PBOF hose.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 25, 2015
    Assignee: Teledyne Instruments, Inc.
    Inventors: Alan D. McCleary, John Bradley Croom, Huijiang Xi, Michael C. Greene
  • Patent number: 9081017
    Abstract: This invention relates to the identification and characterization of specific cellular responses which are associated with tumor necrosis factor receptor 1 (TNFR1) and tumor necrosis factor receptor 1 (TNFR2). Selective modulation of these tumor necrosis factor receptors (TNFRs) Selective modulations of these responses may be useful in the promotion or inhibition of cell growth, for example, in the treatment of disease conditions, including cardiovascular and kidney diseases. Therapeutic methods employed selective TNFR1 and TNFR2 modulators are provided, along with screening methods for the identification of selective TNFR1 and TNFR2 modulators useful in such methods.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: July 14, 2015
    Assignees: Cambridge Enterprise Limited, Yale University
    Inventors: John Bradley, Jordan Pober, Paul Clark, Wang Min, Martin Kluger
  • Publication number: 20150191844
    Abstract: An electroplating system and method has a needle anode associated with an XYZ or multi-direction positioning device and is configured for plating internal surfaces of holes in metal products. The needle anode is positioned such that an insertion portion of the needle anode is centered over a hole and inserted to a predetermined depth in the hole, with a discharge end located a predetermined distance from the inner end of the hole. Plating solution is supplied to the needle anode and flows continuously during plating from the discharge end of the needle, through a gap between the needle anode and inner surface of the hole, and out of the open end of the hole into a drain. In one example, the metal object is a terminal of an electrical connector and the hole is a solder cup at a terminal end of the connector.
    Type: Application
    Filed: January 9, 2014
    Publication date: July 9, 2015
    Applicant: Teledyne Instruments, Inc.
    Inventors: John Bradley Hunter, Chester P. Piechowiak, Theodore M. Heummler
  • Patent number: 9072723
    Abstract: The invention relates to a method for healing blood vessels by stimulating the formation of a confluent endothelial autologous cell layer in vivo on an implantable metallic stent having a lumen and a luminal surface, and an exterior surface. More specifically, the method includes implanting the stent with a coating in a patient in need of thereof; wherein the coating includes one or more layers of a matrix covalently adherent on said luminal and exterior surface of said stent containing one or more pharmaceutical substances on said exterior surface and a therapeutically effective amount of a single type of antibody, antibody fragments or combinations thereof being compatible to binding selectively to a specific cell surface antigen of circulating autologous endothelial progenitor cells in peripheral blood. In addition, genetically engineered endothelial progenitor cells can be captured on said luminal surface of stent in vivo, to proliferate to form rapidly a confluent endothelium in situ.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: July 7, 2015
    Assignee: ORBUS MEDICAL TECHNOLOGY INC
    Inventors: Michael John Bradley Kutryk, Robert J. Cottone, Jr., Stephen M. Rowland
  • Patent number: 9054169
    Abstract: An InGaAs n-channel quantum well heterostructure for use in a complementary transistor having a Sb-based p-channel. The heterostructure includes a buffer layer having a lattice constant intermediate that of the n- and p-channel materials and which is configured to accommodate the strain produced by a lattice-constant mismatch between the n-channel and p-channel materials.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: June 9, 2015
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Brian R. Bennett, John Bradley Boos, Theresa F. Chick, James G. Champlain
  • Patent number: 9006708
    Abstract: A semiconductor device including a heterostructure having at least one low-resistivity p-type GaSb quantum well is provided. The heterostructure includes a layer of In0.52Al0.48As on an InP substrate, where the In0.52Al0.48As is lattice matched to InP, followed by an AlAsxSb1-x buffer layer on the In0.52Al0.48As layer, an AlAsxSb1-x spacer layer on the AlAsxSb1-x buffer layer, a GaSb quantum well layer on the AlAsxSb1-x spacer layer, an AlAsxSb1-x barrier layer on the GaSb quantum well layer, an In0.2Al0.8Sb etch-stop layer on the AlAsxSb1-x barrier layer, and an InAs cap. The semiconductor device is suitable for use in low-power electronic devices such as field-effect transistors.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: April 14, 2015
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Brian R. Bennett, Theresa F. Chick, Mario G. Ancona, John Bradley Boos
  • Patent number: 8983394
    Abstract: Embodiments are disclosed of a switchplexer for performing test operations on a radio device. The switchplexer comprises a plurality of test ports corresponding to a plurality of radio device ports and a plurality of switches for routing test signals between the individual test ports. Processing logic is disclosed for controlling actuation of the switches to route test signals between individual test ports. The switchplexer disclosed herein may be incorporated into a mobile test device for self-test operations or may be used in a manufacturing or maintenance facility for testing and calibration operations.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: March 17, 2015
    Assignee: BlackBerry Limited
    Inventors: John Bradley Deforge, Daniel Noel Badiere, Christopher DeVries
  • Publication number: 20150014745
    Abstract: An InGaAs n-channel quantum well heterostructure for use in a complementary transistor having a Sb-based p-channel. The heterostructure includes a buffer layer having a lattice constant intermediate that of the n- and p-channel materials and which is configured to accommodate the strain produced by a lattice-constant mismatch between the n-channel and p-channel materials.
    Type: Application
    Filed: October 2, 2014
    Publication date: January 15, 2015
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Brian R. Bennett, John Bradley Boos, Theresa F. Chick, James G. Champlain
  • Patent number: 8927354
    Abstract: An apparatus in one example comprises an antimonide-based compound semiconductor (ABCS) stack, an upper barrier layer formed on the ABCS stack, and a gate stack formed on the upper barrier layer. The upper barrier layer comprises indium, aluminum, and arsenic. The gate stack comprises a base layer of titanium and tungsten formed on the upper barrier layer.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: January 6, 2015
    Assignees: Northrop Grumman Systems Corporation, The United States of America As Represented by the Secretary of The Navy
    Inventors: Yeong-Chang Chou, Jay Crawford, Jane Lee, Jeffrey Ming-Jer Yang, John Bradley Boos, Nicolas Alexandrou Papanicolaou
  • Publication number: 20140339501
    Abstract: A semiconductor device including a heterostructure having at least one low-resistivity p-type GaSb quantum well is provided. The heterostructure includes a layer of InwAl1?wAs on a semi-insulating (100) InP substrate, where the InwAl1?wAs is lattice matched to InP, followed by an AlAsxSb1?x buffer layer on the InwAl1?wAs layer, an AlAsxSb1?x spacer layer on the buffer layer, a GaSb quantum well layer on the spacer layer, an AlAsxSb1?x barrier layer on the quantum well layer, an InyAl1?ySb layer on the barrier layer, and an InAs cap. The semiconductor device is suitable for use in low-power electronic devices such as field-effect transistors.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 20, 2014
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Brian R. Bennett, Theresa F. Chick, Mario G. Ancona, John Bradley Boos
  • Patent number: 8884265
    Abstract: An InGaAs n-channel quantum well heterostructure for use in a complementary transistor having a Sb-based p-channel. The heterostructure includes a buffer layer having a lattice constant intermediate that of the n- and p-channel materials and which is configured to accommodate the strain produced by a lattice-constant mismatch between the n-channel and p-channel materials.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: November 11, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Brian R. Bennett, John Bradley Boos, Theresa F. Chick, James G. Champlain
  • Publication number: 20140262413
    Abstract: One or more insulated conductive wire assemblies are incorporated in a pressure balanced, oil-filled (PBOF) hose. Each conductive wire assembly has a pair of conductive wires each having an insulation layer, an insulating material surrounding the insulated wires, and an outer insulating layer surrounding the insulating material. The insulating material may be selected to have a dielectric constant substantially matching the dielectric constant of the oil in the PBOF hose, so that the insulated pair of conductors perform in the same way both before and after the assembly is submerged in oil in the jumper hose. One or more parameters of the conductive wire assembly are selected such that the assembly has a predetermined impedance when submerged in oil within the PBOF hose.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: Teledyne Instruments, Inc.
    Inventors: Alan D. McCleary, John Bradley Croom, Huijiang Xi, Michael C. Greene
  • Publication number: 20140264278
    Abstract: An InGaAs n-channel quantum well heterostructure for use in a complementary transistor having a Sb-based p-channel. The heterostructure includes a buffer layer having a lattice constant intermediate that of the n- and p-channel materials and which is configured to accommodate the strain produced by a lattice-constant mismatch between the n-channel and p-channel materials.
    Type: Application
    Filed: January 16, 2014
    Publication date: September 18, 2014
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Brian R. Bennett, John Bradley Boos, Theresa F. Chick, James G. Champlain
  • Publication number: 20140217363
    Abstract: A semiconductor device including a heterostructure having at least one low-resistivity p-type GaSb quantum well is provided. The heterostructure includes a layer of In0.52Al0.48As on an InP substrate, where the In0.52Al0.48As is lattice matched to InP, followed by an AlAsxSb1-x buffer layer on the In0.52Al0.48As layer, an AlAsxSb1-x spacer layer on the AlAsxSb1-x buffer layer, a GaSb quantum well layer on the AlAsxSb1-x spacer layer, an AlAsxSb1-x barrier layer on the GaSb quantum well layer, an In0.2Al0.8Sb etch-stop layer on the AlAsxSb1-x barrier layer, and an InAs cap. The semiconductor device is suitable for use in low-power electronic devices such as field-effect transistors.
    Type: Application
    Filed: May 16, 2013
    Publication date: August 7, 2014
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Brian R. Bennett, Theresa F. Chick, Mario G. Ancona, John Bradley Boos
  • Patent number: 8675371
    Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: March 18, 2014
    Assignee: Advanced Processor Architectures, LLC
    Inventors: Louis Edmund Chall, John Bradley Serson, Philip Arnold Roberts, Cecil Eugene Hutchins
  • Patent number: 8672633
    Abstract: A vertical axis wind turbine comprising at least two rotor portions, each portion having a bottom, a top, and a curved horizontal cross section when seen in top view. A top cap may be provided that has a convex portion corresponding to each rotor portion that extends forwardly in a windward direction. Each rotor portion may comprise two angled rotor sections that meet at substantially a vertical midpoint of the rotor portion. The angled sections may be angled rearwardly in a leeward direction and/or radially and may be angled from 1 to 20 degrees with respect to vertical. There may be three or more rotor portions and the turbine may be comprised of one or more vertically stacked sections.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: March 18, 2014
    Inventor: John Bradley Ball
  • Patent number: 8652959
    Abstract: A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: February 18, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Brian R. Bennett, John Bradley Boos, Mario Ancona, James G. Champlain, Nicolas A. Papanicolaou
  • Publication number: 20140040813
    Abstract: Methods and systems related to the display of primary and secondary search results are provided. Search results are displayed to the user without requiring the user to perform any tasks to view the entire set of search results. The user may then request secondary searches based on the displayed primary search results through performing a single action. Secondary search results are displayed along with the primary search results.
    Type: Application
    Filed: October 9, 2013
    Publication date: February 6, 2014
    Applicant: Masterfile Corporation
    Inventor: John Bradley McDonald
  • Patent number: D732208
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: June 16, 2015
    Inventor: John Bradley Matchung