Abstract: A power control system and method senses input and/or output voltages of a power supply using sense currents in order for an integrated circuit (IC) switch state controller to generate a control signal to control a switch of the power control system. By sensing sense currents, the power control system can eliminate at least one sense resistor used in a voltage sense system. The sense current(s) can be used to provide power and sensing to the switch state controller. In at least one embodiment, the sense current(s) provide power to the switch state controller when auxiliary IC power is unavailable or diminished, such as during start-up of the IC. In at least one embodiment, the IC draws more sense current from an input of the power control system than the output of the power control system to, for example, minimize impact on the output voltage of the power supply.

Abstract: An embodiment of a display apparatus includes a display panel having at least one segment line, at least one common line, and at least one display element coupled between the at least one segment line and the at least one common line. The display apparatus further includes a first segment driver circuit having at least one first segment driver coupled to a first end of the at least one segment line, and a second segment driver circuit having at least one second segment driver coupled to a second end of the at least one segment line. The display apparatus further includes a first common driver circuit having at least one first common driver coupled to a first end of the at least one common line, and a second common driver circuit having at least one second common driver coupled to a second end of the at least one common line.

Abstract: A temperature and process-stable magnetic field sensor bias current source provides improved performance in Hall effect sensor circuits. A switched-capacitor sensing element is used to sense either a reference current or the bias current directly. A current mirror may be used to generate the bias current from the reference current, and may include multiple current source transistors coupled through corresponding control transistors that are switched using a barrel shifter to reduce variations in the bias current due to process variation. The current mirror control may be provided via a chopper amplifier to reduce flicker noise and the current mirror control voltage may be held using a track/hold circuit during transitions of the chopper amplifier to further reduce noise due to the chopping action.

Abstract: A power control system and method senses input and/or output voltages of a power supply using sense currents in order for an integrated circuit (IC) switch state controller to generate a control signal to control a switch of the power control system. By sensing sense currents, the power control system can eliminate at least one sense resistor used in a voltage sense system. The sense current(s) can be used to provide power and sensing to the switch state controller. In at least one embodiment, the sense current(s) provide power to the switch state controller when auxiliary IC power is unavailable or diminished, such as during start-up of the IC. In at least one embodiment, the IC draws more sense current from an input of the power control system than the output of the power control system to, for example, minimize impact on the output voltage of the power supply.

Abstract: A temperature and process-stable magnetic field sensor bias current source provides improved performance in Hall effect sensor circuits. A switched-capacitor sensing element is used to sense either a reference current or the bias current directly. A current mirror may be used to generate the bias current from the reference current, and may include multiple current source transistors coupled through corresponding control transistors that are switched using a barrel shifter to reduce variations in the bias current due to process variation. The current mirror control may be provided via a chopper amplifier to reduce flicker noise and the current mirror control voltage may be held using a track/hold circuit during transitions of the chopper amplifier to further reduce noise due to the chopping action.

Abstract: A discrete-time programmable-gain analog-to-digital converter (ADC) input circuit with input signal and common-mode current nulling, provides a high input impedance level substantially independent of input capacitor size and input signal gain setting. An input voltage is sampled using one or more reference capacitor(s) that have been charged with a net charge corresponding to a quantizer-controlled reference voltage in a preceding clock phase. Since the charge pulled from the input voltage source is substantially determined only by the quantization error and input noise voltage, the circuit has a high input impedance. The reference capacitor(s) may be discharged in a third clock phase, so that input-signal-dependent voltages are discharged from the capacitor(s). An additional sampling capacitor can be discharged in the first clock phase and coupled in parallel with the reference capacitor during the second clock phase, to set the gain with respect to the input voltage.

Abstract: A discrete-time programmable-gain analog-to-digital converter (ADC) input circuit with multi-phase reference application, provides a high input impedance level substantially independent of input capacitor size and input signal gain setting. An input voltage is sampled at the common mode voltage of the input, using one or more reference capacitor(s) that has been charged in a previous clock phase to the reference feedback voltage. The sampled input voltage is then applied in series with a quantizer-controlled reference voltage to the input of an integrator in a second clock phase. The summing mode of the integrator is maintained at the reference common-mode voltage. Since the charge pulled from the input voltage source is substantially determined only by the quantization error and input noise voltage, the circuit has a high signal input impedance. Since the input voltage source is sampled with respect to its common-mode voltage, the common-mode input impedance is also high.

Abstract: A 27?×28?×½? calendar/organizer that combines a large, 12-page, printed paper calendar with a ¼?-½? thick and “pin-receiving” backboard. The front sheets are printed with a calendar array of days and weeks, with each day having a height of at least four inches, such as days which are 4½ inches tall by 4 inches wide. The front sheets are attached to the backing board at their upper ends by two heavy duty staples, and have three mounting holes punched in aligned locations between the staples. The backing board is provided by double layer cardboard with each layer thicker than the plurality of front sheets, so the backing board can receive and hold a tack or push pin without regard to whether the tack or push pin extends through none, one or all of the front sheets. The backing board may extend longer than the front sheet calendar pages, so as to facilitate an additional “pinning surface” for items not associated with any particular day of the month.

Abstract: Transformerless ethernet controller. A method for isolating an ethernet controller, having a transceiver associated therewith, from a twisted wire transmission line is provided. The power supply of the transceiver is DC isolated from system power supply. The data side of the ethernet controller is DC isolated from the transceiver for both transmit and receive data. The transceiver is directly connected to the transmission line with no DC isolation.

Abstract: A 27?×28?×½? calendar/organizer that combines a large, 12-page, printed paper calendar with a ¼?- l/2? thick and “pin-receiving” backboard. The front sheets are printed with a calendar array of days and weeks, with each day having a height of at least four inches, such as days which are 4½ inches tall by 4 inches wide. The front sheets are attached to the backing board at their upper ends by two heavy duty staples, and have three mounting holes punched in aligned locations between the staples. The backing board is provided by double layer cardboard with each layer thicker than the plurality of front sheets, so the backing board can receive and hold a tack or push pin without regard to whether the tack or push pin extends through none, one or all of the front sheets. The backing board may extend longer than the front sheet calendar pages, so as to facilitate an additional “pinning surface” for items not associated with any particular day of the month.

Abstract: Method and apparatus for configuring the operation of an integrated circuit. An integrated circuit with external programming capabilities is disclosed. A pin current source is provided for interfacing with at least one pin on the integrated circuit to control current flow there through to an external load interfaced to the at least one pin external to the integrated circuit. The external load has at least two discrete values. A voltage detector detects the voltage on the at least one pin and a state detector then compares the voltage on the at least one pin to at least two discrete voltage thresholds. Each of the discrete voltages is associated with a separate value of a control word, and the state detector is operable to determine the value of the control word associated with the detected voltage. The state detector then outputs the determined value of the control word.

Abstract: Switching node regulator for sfp ethernet adaptor. A method is disclosed for regulating voltage on an integrated circuit formed on a substrate to power circuitry on the substrate. An unregulated power supply is provided as an input to the integrated circuit connected between a positive node and a reference node on the integrated circuit. Current is sourced in a first current sourcing step through drive circuitry on the substrate from the positive node to an inductor/capacitor reactive circuit external to the integrated circuit. The output of the inductor/capacitor reactive circuit comprises a filtered regulated power supply voltage that is operable to power at least a portion of the circuitry on the substrate. Current is sourced in a second current sourcing step through the drive circuitry on the substrate from the reference node to the inductor/capacitor reactive circuit when the current in the inductor is ramping down.

Abstract: An sample rate converter for non-audio AES data channels is presented. Channel status (C) information is transferred in 192-bit blocks. Access to received C channel data blocks is allowed, before the blocks are re-transmitted at the output sample rate. This enables users to modify the data, alleviating the effect of data loss caused by different input and output sample frequencies. For U channel status information, U channel status information is transferred as 2×192 bit blocks like the channel status (C) scheme above, as individual information units (IUs), or as messages consisting of 129 IUs. In the latter 2 schemes, the lengths of output inter-IU filler segments or output intemessage filler segments are varied relative to the lengths of inputs inter-IU filler segments or input inter-IU message segments respectively, to compensate for the difference between the input sample frequency and the output sample frequency.

Abstract: An asynchronous sample rate converter for converting a first sample rate in a signal to a second sample rate in the same signal is presented. The signal is first provided as input to an interpolator which upsamples the signal to form a signal having sample rate UFs1 where the upsampling factor U is a variable that is directly related to the ratio Fs2/Fs1. The resampler then linearly interpolates the upsampled signal to form a signal having sample rate DFs2. Finally, the resampled signal is downsampled to form a signal having sample rate Fs2.

Abstract: A calendar organizer has pockets for receiving documents or other items associated with each day on the calendar. Five horizontally extending front sheets attached to a substantially continuous backing sheet. Seven front pocket surface portions are defined within each front sheet. Pockets are created by attaching the bottom edge and one vertical edge of the front pocket surface portion to the backing sheet, and two edges of the pockets are left free. A template is used to create the front sheets. The front sheets overlay each other, such that the top edge of lower pockets is higher on the backing sheet than the bottom edge of upper pockets.

Abstract: A three-dimensional puzzle game having six sides comprising a cube wherein each side includes nine squares forming three columns intersecting three rows, any of the columns and rows being rotatable about an orthogonal axis of the cube with a single individual such rotation being accomplishable at a time, each of the six sides carrying a different integrated, invertible pictorial design with interchangeable portions which appear on each of the nine squares of each side.