Abstract: A method comprising identifying a set of target features for a plurality of data instances of an input data collection; determining feature values for the set of target features for the plurality of data instances; identifying a plurality of outlier data instances based on the determined feature values; identifying a plurality of noisy data instances from the outlier data instances based on feature values of the plurality of noisy data instances, wherein a noisy data instance is identified based on a determination that noise is present in noisy data instance; and providing an indication of the plurality of noisy data instances.

Abstract: Lithographic apparatuses suitable for complementary e-beam lithography (CEBL) are described. In an example, a method of forming a pattern for a semiconductor structure includes forming a pattern of parallel lines above a substrate. The method also includes aligning the substrate in an e-beam tool to provide the pattern of parallel lines parallel with a scan direction of the e-beam tool. The e-beam tool includes a column having a blanker aperture array (BAA) with a staggered pair of columns of openings along an array direction orthogonal to the scan direction. The method also includes forming a pattern of cuts or vias in or above the pattern of parallel lines to provide line breaks for the pattern of parallel lines by scanning the substrate along the scan direction. A cumulative current through the column has a non-zero and substantially uniform cumulative current value throughout the scanning.

Abstract: A method includes identifying a first geometric pattern that failed a design rule check, identifying a second geometric pattern that passed the design rule check, morphing the first geometric pattern based on the second geometric pattern to generate a morphed geometric pattern, wherein the morphed geometric pattern passes the design rule check, and replacing the first geometric pattern with the morphed geometric pattern.

Abstract: Images are accessed representing a status in a fabrication of a semiconductor chip corresponding to a particular stage in the fabrication. Distortion is removed from the images and actual features of the semiconductor chip are extracted from the images. Synthesized ideal features of the semiconductor chip associated with completion of the particular stage in the fabrication are determined from the one or more images. The actual features are compared to the ideal features to determine whether anomalies associated with the particular stage exist in the semiconductor chip.

Abstract: Lithographic apparatuses suitable for complementary e-beam lithography (CEBL) are described. In an example, a method of forming a pattern for a semiconductor structure includes forming a pattern of parallel lines above a substrate. The method also includes aligning the substrate in an e-beam tool to provide the pattern of parallel lines parallel with a scan direction of the e-beam tool. The e-beam tool includes a column having a blanker aperture array (BAA) with a staggered pair of columns of openings along an array direction orthogonal to the scan direction. The method also includes forming a pattern of cuts or vias in or above the pattern of parallel lines to provide line breaks for the pattern of parallel lines by scanning the substrate along the scan direction. A cumulative current through the column has a non-zero and substantially uniform cumulative current value throughout the scanning.

Abstract: Lithographic apparatuses suitable for complementary e-beam lithography (CEBL) are described. In an example, a method of forming a pattern for a semiconductor structure includes forming a pattern of parallel lines above a substrate. The method also includes aligning the substrate in an e-beam tool to provide the pattern of parallel lines parallel with a scan direction of the e-beam tool. The e-beam tool includes a column having a blanker aperture array (BAA) with a staggered pair of columns of openings along an array direction orthogonal to the scan direction. The method also includes forming a pattern of cuts or vias in or above the pattern of parallel lines to provide line breaks for the pattern of parallel lines by scanning the substrate along the scan direction. A cumulative current through the column has a non-zero and substantially uniform cumulative current value throughout the scanning.

Abstract: A search engine receives data describing reference geometry and generates a hash based on the reference geometry. A reference bloom filter is generated for the reference geometry based on the hash. The search engine performs a search to determine whether instances of the reference geometry are present in an integrated circuit (IC) layout. The search includes comparing the reference bloom filter with each one of a plurality of bloom filters corresponding to a plurality of subdomains of the IC layout. Based on results of the comparison, one or more subdomains of interest are identified and searched to determine whether the particular reference geometry is present in the subdomain.

Abstract: An improved random forest model is provided, which has been trained based on silicon data generated from tests of previously fabricated chips. An input is provided to the random forest model, the input including a feature set of a pattern within a particular chip layout, the feature set identifying geometric attributes of polygonal elements within the pattern. A result is generated by the random forest model based on the input, where the result identifies a predicted attribute of the pattern based on the silicon data, and the result is generated based at least in part on determining, within the random forest model, that geometric attributes of the pattern were included in the previously fabricated chips, where the previously fabricated chips have chip layouts are different from the particular chip layout.

Abstract: A machine readable storage medium, a method and an apparatus. The method comprises selecting a candidate set of parameters from a plurality of available parameters comprising variables that affect an outcome of a lithography process; performing a set of optimizations wherein each optimization of the set of optimizations is subject to a plurality of objectives and tolerances and a set of constraints, wherein performance of said each optimization comprises: modifying values of at least a portion of the candidate set of parameters to derive a predicted outcome for said each optimization; and determining whether a difference between the predicted outcome and an intended outcome is within an error threshold; and if the difference exceeds the error threshold, perform a subsequent optimization, and otherwise generate an input file including modified values, corresponding to a last one of the set of optimizations, for the at least a portion of the candidate set of parameters.

Abstract: Reinforcement learning methods are applied to the multi-domain problem of developing photoresist models for advanced semiconductor technologies. In an iterative process, candidate photoresist models are selected or generated, with each model comprising an optical imaging model, one or more analytical chemistry or deformation kernels, and one or more photoresist development model terms. Model parameters to be calibrated in an iteration are selected. The candidate photoresist models are calibrated to best fit photoresist contours extracted from SEM images. Values for the calibration model parameters are determined and the most useful analytical kernels are kept in each model while the others are dropped. A genetic algorithm uses the best calibrated photoresist models from the prior iteration to develop candidate models for the next iteration. The process iterates until no further accuracies can be gained. A residual minimization model can be trained to correct for residual errors in the final model.

Abstract: A machine readable storage medium, a method and an apparatus. The method comprises selecting a candidate set of parameters from a plurality of available parameters comprising variables that affect an outcome of a lithography process; performing a set of optimizations wherein each optimization of the set of optimizations is subject to a plurality of objectives and tolerances and a set of constraints, wherein performance of said each optimization comprises: modifying values of at least a portion of the candidate set of parameters to derive a predicted outcome for said each optimization; and determining whether a difference between the predicted outcome and an intended outcome is within an error threshold; and if the difference exceeds the error threshold, perform a subsequent optimization, and otherwise generate an input file including modified values, corresponding to a last one of the set of optimizations, for the at least a portion of the candidate set of parameters.

Abstract: Images are accessed representing a status in a fabrication of a semiconductor chip corresponding to a particular stage in the fabrication. Distortion is removed from the images and actual features of the semiconductor chip are extracted from the images. Synthesized ideal features of the semiconductor chip associated with completion of the particular stage in the fabrication are determined from the one or more images.

Abstract: An improved random forest model is provided, which has been trained based on silicon data generated from tests of previously fabricated chips. An input is provided to the random forest model, the input including a feature set of a pattern within a particular chip layout, the feature set identifying geometric attributes of polygonal elements within the pattern. A result is generated by the random forest model based on the input, where the result identifies a predicted attribute of the pattern based on the silicon data, and the result is generated based at least in part on determining, within the random forest model, that geometric attributes of the pattern were included in the previously fabricated chips, where the previously fabricated chips have chip layouts are different from the particular chip layout.

Abstract: A method includes identifying a first geometric pattern that failed a design rule check, identifying a second geometric pattern that passed the design rule check, morphing the first geometric pattern based on the second geometric pattern to generate a morphed geometric pattern, wherein the morphed geometric pattern passes the design rule check, and replacing the first geometric pattern with the morphed geometric pattern.

Abstract: A method comprising identifying a set of target features for a plurality of data instances of an input data collection; determining feature values for the set of target features for the plurality of data instances; identifying a plurality of outlier data instances based on the determined feature values; identifying a plurality of noisy data instances from the outlier data instances based on feature values of the plurality of noisy data instances, wherein a noisy data instance is identified based on a determination that noise is present in noisy data instance; and providing an indication of the plurality of noisy data instances.

Abstract: A search engine receives data describing reference geometry and generates a hash based on the reference geometry. A reference bloom filter is generated for the reference geometry based on the hash. The search engine performs a search to determine whether instances of the reference geometry are present in an integrated circuit (IC) layout. The search includes comparing the reference bloom filter with each one of a plurality of bloom filters corresponding to a plurality of subdomains of the IC layout. Based on results of the comparison, one or more subdomains of interest are identified and searched to determine whether the particular reference geometry is present in the subdomain.

Abstract: Lithographic apparatuses suitable for complementary e-beam lithography (CEBL) are described. In an example, a method of forming a pattern for a semiconductor structure includes forming a pattern of parallel lines above a substrate. The method also includes aligning the substrate in an e-beam tool to provide the pattern of parallel lines parallel with a scan direction of the e-beam tool. The e-beam tool includes a column having a blanker aperture array (BAA) with a staggered pair of columns of openings along an array direction orthogonal to the scan direction. The method also includes forming a pattern of cuts or vias in or above the pattern of parallel lines to provide line breaks for the pattern of parallel lines by scanning the substrate along the scan direction. A cumulative current through the column has a non-zero and substantially uniform cumulative current value throughout the scanning.

Abstract: A control system for electronically controlling engine speed and PTO clutch mechanism engagement of a grounds maintenance vehicle such as a lawn mower. In one embodiment, an electronic controller (electronic control unit or ECU) may receive operator inputs from a speed setting switch and an on/off PTO clutch engagement switch. The ECU may take these inputs and make intelligent decisions as to when to engage/disengage the clutch mechanism and may change engine speed automatically prior to, during, and/or after clutch mechanism engagement/disengagement. In one or more of these speed setting switch positions, the switch may set a speed of the engine to a first speed when the clutch mechanism is disengaged, and a second speed (different than the first speed) when the clutch mechanism is engaged.

Abstract: Defective artifact removal is described in photolithography masks corrected for optical proximity. In one example a method is described in which partitions are identified in a mask design for independent optimization. The partitions are grouped and ordering into stages. The first stage is processed. Geometries are extracted from the periphery of the first stage partitions. The extracted geometries are added to the peripheries of second stage partitions. Then the second stage partitions are processed.

Abstract: A control system for electronically controlling engine speed and PTO clutch mechanism engagement of a grounds maintenance vehicle such as a lawn mower. In one embodiment, an electronic controller (electronic control unit or ECU) may receive operator inputs from a speed setting switch and an on/off PTO clutch engagement switch. The ECU may take these inputs and make intelligent decisions as to when to engage/disengage the clutch mechanism and may change engine speed automatically prior to, during, and/or after clutch mechanism engagement/disengagement. In one or more of these speed setting switch positions, the switch may set a speed of the engine to a first speed when the clutch mechanism is disengaged, and a second speed (different than the first speed) when the clutch mechanism is engaged.