Abstract: A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias and plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer terminating in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.

Abstract: A method of forming a printed circuit card with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the card including a metal layer termination in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.

Abstract: A method of forming a printed circuit board with a metal power plane layer between two photoimageable dielectric layers is provided. Photoformed metal filled vias and plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials connected to the vias and plated through holes. A border may be around the board including a metal layer terminating in from the edge of one of the dielectric layers. Copper foil with clearance holes is provided. First and second layers of photoimageable curable dielectric material are on opposite sides of the copper. Patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. Through holes are developed where holes were patterned in both dielectric layers. The surfaces of the photoimageable material, vias and through holes are metallized by copper plating, preferably using photoresist.

Abstract: A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers.

Abstract: In accordance with the present invention, a method of treating the surface of an organic substrate, particularly a circuitized surface of an organic substrate, which method reduces the spread of adhesive resin that is subsequently deposited on the surface, is provided. This method comprises the steps of applying a treatment solution comprising a fatty acid compound, an alkalizing agent, and a solvent comprising water and from about 5% to about 90% by volume of an organic solvent selected from the group consisting of an alcohol, a glycol ether, and combinations thereof to the surface; and then removing substantially all of the solvent from the solution to provide a thin film on the surface of said substrate. The film comprises the fatty acids that were present in the treatment solution. In a preferred embodiment the treatment solution further comprises a chelating agent.

Abstract: A process and apparatus are described for wire bonding circuit pads of large scale integrated design. The bonding process employs a capillary tool that applies heat and pressure to the wires in order to bond them to the circuit pad. The circuit pad is supported upon a closed woven, fiberglass mesh, which supports the circuit pad during the bonding process.

Abstract: A method for conductively filling a hole or via disposed in an electronic package to provide a structure having a lower coefficient of thermal expansion. After fabricating a through hole or a plated through hole in an electronic package, the hole or via is filled with metal, and the surface of the electronic package is sealed.

Abstract: In accordance with the present invention, a method of treating the surface of an organic substrate, particularly a circuitized surface of an organic substrate, which method reduces the spread of adhesive resin that is subsequently deposited on the surface, is provided. This method comprises the steps of applying a treatment solution comprising a fatty acid compound, an alkalizing agent, and a solvent comprising water and from about 5% to about 90% by volume of an organic solvent selected from the group consisting of an alcohol, a glycol ether, and combinations thereof to the surface; and then removing substantially all of the solvent from the solution to provide a thin film on the surface of said substrate. The film comprises the fatty acids that were present in the treatment solution. In a preferred embodiment the treatment solution further comprises a chelating agent.

Abstract: A technique is provided for forming a circuitized substrate which substantially reduces defects in a circuit board formed of multiple layers of dielectric material on each of which layers electrical circuitry is formed. Each layer of dielectric material is formed of two distinct and separate coatings or sheets or films of a photopatternable dielectric material which is photoformed to provide through openings to the layer of circuitry below and then plated with the desired circuitry including plating in the photoformed openings to form vias. In this way if there is a pin hole type defect in either coating or sheet of dielectric material, in all probability it will not align with a similar defect in the other sheet or coating of the dielectric layer, thus preventing unwanted plating extending from one layer of circuitry to the underlying layer of circuitry.

Abstract: A process and apparatus are described for wire bonding circuit devices of large scale integrated design. The bonding process employs a capillary tool that applies heat and pressure to the wires in order to bond them to the circuit device. The circuit device, or pad, is supported upon a closed woven, fiberglass mesh, which supports the circuit device during the bonding process.

Abstract: A technique is provided for forming a circuitized substrate which substantially reduces defects in a circuit board formed of multiple layers of dielectric material on each of which layers electrical circuitry is formed. Each layer of dielectric material is formed of two distinct and separate coatings or sheets or films of a photopatternable dielectric material which is photoformed to provide through openings to the layer of circuitry below and then plated with the desired circuitry including plating in the photoformed openings to form vias. In this way if there is a pin hole type defect in either coating or sheet of dielectric material, in all probability it will not align with a similar defect in the other sheet or coating of the dielectric layer, thus preventing unwanted plating extending from one layer of circuitry to the underlying layer of circuitry.

Abstract: A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers.

Abstract: A technique for forming an organic chip carrier or circuit board, having two voltage planes and at least two signal planes is provided which includes bonding a first layer of photolithographic dielectric material to a first metal layer and exposing the first layer of dielectric material to a pattern of radiation to provide at least one opening through the first layer of the dielectric material. A second metal layer is bonded to the first layer of photoimageable material on the opposite side from the first metal layer. Holes are etched in the first and second metal layers which correspond to and are larger than each of the patterns on said openings in the first layer of dielectric material. The exposed pattern on the first layer of dielectric material is then developed, with the openings in the first and second metal layers being larger than the corresponding developed opening in the first dielectric material.

Abstract: In accordance with the present invention, a method of treating the surface of an organic substrate, particularly a circuitized surface of an organic substrate, which method reduces the spread of adhesive resin that is subsequently deposited on the surface, is provided. This method comprises the steps of applying a treatment solution comprising a fatty acid compound, an alkalizing agent, and a solvent comprising water and from about 5% to about 90% by volume of an organic solvent selected from the group consisting of an alcohol, a glycol ether, and combinations thereof to the surface; and then removing substantially all of the solvent from the solution to provide a thin film on the surface of said substrate. The film comprises the fatty acids that were present in the treatment solution. In a preferred embodiment the treatment solution further comprises a chelating agent.

Abstract: A method of making a circuitized substrate wherein fill material is forced into the substrate's holes to thus provide additional support for conductive circuitry or the like thereon, thus increasing the final product's circuit density. The fill is provided in a substantially uncured state, following which partial cure occurs. Thereafter, the fill is substantially fully cured and the aforementioned circuit elements may then be provided directly thereon. Alternatively, a dual fill process is used with both quantities of uncured fill being disposed in each hole and then cured by a singular UV exposure step.

Abstract: A multilayer circuit board having a conformal layer of an insulating material separating a circuit core from an adjacent insulating layer is disclosed. The conformal layer encapsulates the substrate and conductive pattern of circuit lines in the circuit core, thereby reducing failures caused by impurities trapped during lamination. The multilayer circuit board is manufactured by coating at least one circuit core with the conformal layer of insulating material before final lamination of the circuit cores into a multilayer circuit board.

Abstract: A stripping composition containing O-dichlorobenzene, dodecylbenzene sulfonic acid, perchloroethylene, and optionally an aromatic hydrocarbon containing at least 8 carbon atoms, and use thereof for removing photoresist.

Abstract: A multilayer circuit board having a conformal layer of an insulating material separating a circuit core from an adjacent insulating layer is disclosed. The conformal layer encapsulates the substrate and conductive pattern of circuit lines in the circuit core, thereby reducing failures caused by impurities trapped during lamination. The multilayer circuit board is manufactured by coating at least one circuit core with the conformal layer of insulating material before final lamination of the circuit cores into a multilayer circuit board.

Abstract: A method for improving the adhesion of a polymer such as an epoxy resin to an electrolytic copper surface wherein the copper surface to be adhered is exposed to gas plasma containing a fluorohydrocarbon.

Abstract: A system for generating a substantially uniform plasma for processing a substrate having two major surfaces. Each of the substrate major surfaces may have electrically conductive portions. Two electrodes are oppositely disposed with respect to one another on either side of the substrate. A first r.f. power source is electrically connected to the first electrode and a second r.f. power source is electrically connected to the second electrode. The first and second r.f. power sources are out of phase with respect to one another, resulting in the generation of a substantially uniform plasma field.