Abstract: Sensitive circuit design information in HDL Interface Logic Models such as module names and structures within certain EDA tool design views is eliminated by substituting selected instance and net names with unrelated unique identifiers prior to transferring the design views as part of a simulation model of a circuit design, and consequently avoiding unauthorized use of that information. The method for encoding signal names in different design views of an IC design includes providing a list of names contained in a plurality of design databases, changing each name in the list of names to a protected name, and substituting each changed name with an associated protected name in each design view database.

Abstract: In a data processing system which defines and processes objects and defines a plurality of virtual screens of display data with which views of objects can be associated, the system defines distinct anterior and posterior display layers for display, with the anterior layer having a background such that the content of the posterior display layer can be viewed therethrough and with one of the layers being assignable for the display of a selected virtual screen and the other display layer being dedicated for the display of an additional screen. The system also provides for the transfer of objects between the anterior and posterior display layers such that the dedicated layer can be used for transporting objects between virtual screens.