Patents by Inventor John Aasen

John Aasen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220129537
    Abstract: A method and system for authenticating and enabling activation of a configuration used for controlling a product, where the configuration is implemented as safety critical logic functions in programmable logic blocks of a Field Programmable Gate Array, FPGA, having a volatile configuration-memory. The configuration is loaded into the volatile configuration-memory of the FPGA via an external interface input of the FPGA. The content of the configuration-memory of the FPGA is read via an interface of the FPGA. This is done immediately after completed loading of the configuration into the memory of the FPGA. A Cyclic Redundancy Check, CRC, checksum of the read content of the configuration-memory is computed in an CRC checksum generator, and a resulting generated CRC checksum value is compared with an externally stored valid CRC checksum value of the expected FPGA configuration.
    Type: Application
    Filed: October 25, 2021
    Publication date: April 28, 2022
    Applicant: Kongsberg Defence & Aerospace AS
    Inventors: John Aasen, Frode Borgersen