Patents by Inventor John Allen Pitney
John Allen Pitney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10184193Abstract: A susceptor supports a semiconductor wafer and includes a substantially cylindrical body comprising an outer rim having an upper surface. The body also includes a recess extending into the body from the upper surface to a recess floor such that the recess is sized and shaped for receiving the wafer therein. The body further includes a ledge extending between the rim and the recess floor. The ledge includes a ramp comprising a first surface, a second surface, and a third surface. The first surface is oriented at a first angle with respect to the upper surface; the second surface is oriented at a second angle oriented with respect to the upper surface; and the third surface is oriented at a third angle with respect to the upper surface. Further, the second angle is greater than the first angle.Type: GrantFiled: May 18, 2016Date of Patent: January 22, 2019Assignee: GlobalWafers Co., Ltd.Inventor: John Allen Pitney
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Publication number: 20160340799Abstract: A susceptor supports a semiconductor wafer and includes a substantially cylindrical body comprising an outer rim having an upper surface. The body also includes a recess extending into the body from the upper surface to a recess floor such that the recess is sized and shaped for receiving the wafer therein. The body further includes a ledge extending between the rim and the recess floor. The ledge includes a ramp comprising a first surface, a second surface, and a third surface. The first surface is oriented at a first angle with respect to the upper surface; the second surface is oriented at a second angle oriented with respect to the upper surface; and the third surface is oriented at a third angle with respect to the upper surface. Further, the second angle is greater than the first angle.Type: ApplicationFiled: May 18, 2016Publication date: November 24, 2016Inventor: John Allen Pitney
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Patent number: 9401271Abstract: Apparatus and methods for wafer processes such as etching and chemical vapor deposition processes are disclosed. In some embodiments, the apparatus includes a susceptor and a ring disposed beneath the susceptor to influence a thickness of the deposited epitaxial layer.Type: GrantFiled: March 15, 2013Date of Patent: July 26, 2016Assignee: SunEdison Semiconductor Limited (UEN201334164H)Inventors: John Allen Pitney, Manabu Hamano
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Patent number: 9328420Abstract: In one aspect, a system for depositing a layer on a substrate is provided. The system includes a processing chamber, a gas injecting port, a gas distribution plate, and a plug. The gas injecting port is disposed upstream from the processing chamber. The gas distribution plate is disposed between the gas injecting port and the processing chamber, and includes an elongate planar body and an array of holes therein. The plug is sized to be received within one of the holes, and includes an orifice therethrough for permitting the passage of gas. The plug is capable of being removably secured to the gas distribution plate within one of the holes.Type: GrantFiled: March 14, 2013Date of Patent: May 3, 2016Assignee: SunEdison Semiconductor Limited (UEN201334164H)Inventors: John Allen Pitney, Manabu Hamano
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Patent number: 9193025Abstract: A method of polishing a wafer is disclosed that includes determining a removal profile. The wafer is measured to determine a starting wafer profile and then the wafer is polished. The wafer is again measured after being polished to determine a polished wafer profile. The starting wafer profile and the polished wafer profile are compared to each other to determine the removal profile by computing the amount and shape of material removed from the first wafer during polishing.Type: GrantFiled: March 13, 2013Date of Patent: November 24, 2015Assignee: SunEdison Semiconductor Limited (UEN201334164H)Inventors: Sumeet S. Bhagavat, Khiam How Low, Ichiron Yoshimura, John Allen Pitney
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Patent number: 9117670Abstract: A system for depositing a layer on a substrate includes a processing chamber, a gas injecting port for introducing gas into the system, a gas distribution plate disposed between the gas injecting port and the processing chamber, the gas distribution plate including holes therein, and an inject insert liner assembly received within the system adjacent to the gas distribution plate and upstream from the processing chamber. The inject insert liner assembly defines gas flow channels therein extending along a lengthwise direction of the system, wherein each channel includes an inlet and an outlet, and at least one channel is tapered along the lengthwise direction of the system in at least one of a vertical or horizontal direction. The inject insert liner assembly has the same number of gas flow channels as the number of holes in the gas distribution plate.Type: GrantFiled: March 14, 2013Date of Patent: August 25, 2015Assignee: SunEdison Semiconductor Limited (UEN201334164H)Inventors: Arash Abedijaberi, John Allen Pitney, Shawn Thomas
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Patent number: 8940094Abstract: A method of fabricating a semiconductor processing device includes providing a susceptor including a substantially cylindrical body portion having opposing upper and lower surfaces. The body portion has a diameter larger than a wafer diameter. The method also includes providing a set of holes circumferentially disposed at a first susceptor diameter, the set of holes being evenly spaced with respect to adjacent holes and extending through the upper and lower surfaces in an area. The first susceptor diameter is larger than the wafer diameter, and holes are omitted along the first diameter in a set of predetermined orientations.Type: GrantFiled: April 10, 2012Date of Patent: January 27, 2015Assignee: SunEdison Semiconductor LimitedInventors: John Allen Pitney, Manabu Hamano
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Publication number: 20140273410Abstract: A system for depositing a layer on a substrate includes a processing chamber, a gas injecting port for introducing gas into the system, a gas distribution plate disposed between the gas injecting port and the processing chamber, the gas distribution plate including holes therein, and an inject insert liner assembly received within the system adjacent to the gas distribution plate and upstream from the processing chamber. The inject insert liner assembly defines gas flow channels therein extending along a lengthwise direction of the system, wherein each channel includes an inlet and an outlet, and at least one channel is tapered along the lengthwise direction of the system in at least one of a vertical or horizontal direction. The inject insert liner assembly has the same number of gas flow channels as the number of holes in the gas distribution plate.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Inventors: Arash Abedijaberi, John Allen Pitney, Shawn Thomas
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Publication number: 20140273503Abstract: A method of depositing an epitaxial layer on a silicon wafer is described. The silicon wafer has a diameter, and is disposed within a processing chamber within a deposition system. The method includes the steps of introducing a process gas into the system from a gas injecting port, flowing the process gas through a gas distribution plate in fluid communication with the gas injecting port and the processing chamber, the gas distribution plate including an inner array of holes and an outer array of holes, and controlling the gas flow distribution across the substrate surface. The controlling step includes selecting at least one orifice-containing plug to be secured within a hole in the gas distribution plate, and securing the selected plug within the hole.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Inventors: John Allen Pitney, Manabu Hamano
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Publication number: 20140273748Abstract: A method of polishing a wafer is disclosed that includes determining a removal profile. The wafer is measured to determine a starting wafer profile and then the wafer is polished. The wafer is again measured after being polished to determine a polished wafer profile. The starting wafer profile and the polished wafer profile are compared to each other to determine the removal profile by computing the amount and shape of material removed from the first wafer during polishing.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventors: Sumeet S. Bhagavat, Khiam How Low, Ichiron Yoshimura, John Allen Pitney
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Publication number: 20140273411Abstract: A method of depositing an epitaxial layer on a silicon wafer is described. The silicon wafer has a diameter, and is disposed within a processing chamber within a deposition system. The deposition includes a gas distribution plate in fluid communication with a gas injecting port and the processing chamber. The method includes the steps of introducing a process gas into the system from the gas injecting port, flowing the process gas through a flow channel extending along a lengthwise direction of the system and being tapered along the lengthwise direction of the system in at least one of a vertical or horizontal direction, wherein the flow channel is defined by an inject insert liner assembly adjacent to the gas distribution plate, and depositing an epitaxial layer on the wafer at a deposition rate of at least about 2.3 micrometers per minute.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Inventors: Arash Abedijaberi, John Allen Pitney, Manabu Hamano
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Publication number: 20140273409Abstract: In one aspect, a system for depositing a layer on a substrate is provided. The system includes a processing chamber, a gas injecting port, a gas distribution plate, and a plug. The gas injecting port is disposed upstream from the processing chamber. The gas distribution plate is disposed between the gas injecting port and the processing chamber, and includes an elongate planar body and an array of holes therein. The plug is sized to be received within one of the holes, and includes an orifice therethrough for permitting the passage of gas. The plug is capable of being removably secured to the gas distribution plate within one of the holes.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventors: John Allen Pitney, Manabu Hamano
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Publication number: 20130276695Abstract: Apparatus and methods for wafer processes such as etching and chemical vapor deposition processes are disclosed. In some embodiments, the apparatus includes a susceptor and a ring disposed beneath the susceptor to influence a thickness of the deposited epitaxial layer.Type: ApplicationFiled: March 15, 2013Publication date: October 24, 2013Applicant: MEMC ELECTRONIC MATERIALS, INC.Inventors: John Allen Pitney, Manabu Hamano
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Publication number: 20130263779Abstract: A susceptor for supporting a semiconductor wafer during an epitaxial chemical vapor deposition process, the susceptor defining a wafer diameter, the susceptor includes a substantially cylindrical body portion having opposing upper and lower surfaces. The body portion has a diameter larger than the wafer diameter. The susceptor includes a set of holes circumferentially disposed at a first susceptor diameter, the set of holes is evenly spaced with respect to adjacent holes and extending through the upper and lower surfaces in an area. The first susceptor diameter is larger than the wafer diameter, and holes are omitted along the first diameter in a predetermined orientation.Type: ApplicationFiled: April 10, 2012Publication date: October 10, 2013Applicant: MEMC Electronic Materials, Inc.Inventors: John Allen Pitney, Manabu Hamano
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Publication number: 20130263776Abstract: A method of fabricating a semiconductor processing device includes providing a susceptor including a substantially cylindrical body portion having opposing upper and lower surfaces. The body portion has a diameter larger than a wafer diameter. The method also includes providing a set of holes circumferentially disposed at a first susceptor diameter, the set of holes being evenly spaced with respect to adjacent holes and extending through the upper and lower surfaces in an area. The first susceptor diameter is larger than the wafer diameter, and holes are omitted along the first diameter in a set of predetermined orientations.Type: ApplicationFiled: April 10, 2012Publication date: October 10, 2013Applicant: MEMC Electronic Materials, Inc.Inventors: John Allen Pitney, Manabu Hamano