Abstract: A process for evaluating and correcting virtual integrated circuit designs includes a method and apparatus for determining a ratio of an amount of material, i.e. polysilicon or metal, in any given layer to an area of the layer. The ratio is then compared to a predetermined target ratio, which is based on a ratio of the total amount of the material to the entire area of the I-C design. The process then automatically inserts or deletes an amount of material from the layer as needed, using any of four methods. These methods include deletion, scaling, deletion and scaling or striping. The ratio for an erroneous layer is rechecked after the first correction is performed and the entire process is repeated using a Newton-Raphson or a Least Absolute Deviation Regression method until the ratio falls within the predetermined tolerances. If the layer has been filled, the layer is further checked for short circuits, fill isolation violations, antenna violations and the like which may have resulted from the material fill.

Abstract: A user interface for a graphical application tool is disclosed. A graphical application tool is a software program, such as a computer-aided design (CAD) tool, a spreadsheet package, or a graphics drawing package, that graphically provides a user with a set of commands, tools and icons, which a user can graphically manipulate to generate, modify or analyze a work product in a work space area. The graphical application tool includes a graphical user interface (GUI) to provide users with a repositionable menu of available commands, tools and icons. The menu provides access to the commands, tools and device offerings without interfering with the user's work space area. In the illustrative computer-aided design (CAD) tool embodiment, the menu preferably provides a user with access to core and custom commands and circuit component offerings.