Patents by Inventor John Ayres

John Ayres has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150370548
    Abstract: Systems, device and techniques are disclosed for publishing multiple versions of an application to an application market, via an application programming interface. The application programming interface may be configured to allow automated uploads of multiple version of an application without requiring individual uploads of each version. A developer associated party may provide the multiple versions of the application via the application programming interface. The multiple versions of the applications may be provided via the application programming interface and not an application market interface. The multiple versions may be published in an application to different set of users.
    Type: Application
    Filed: June 23, 2014
    Publication date: December 24, 2015
    Inventors: John Ayres, Elizabeth Ireland Powers, Nicolas Fortescue, Andrea Ambu
  • Publication number: 20150286478
    Abstract: Implementations of the disclosed subject matter provide systems and methods for providing one or more versions of an application to one or more subsets of users based on measured performance of the one or more versions of the application. A method may include providing a first version of an application to a first subset of users of the application. Next, performance of the first version of the application may be measured and a second subset of users of the application may be selected based on the performance of the first version of the application. As a result, a second version of the application may be provided to the second subset of users of the application.
    Type: Application
    Filed: June 17, 2015
    Publication date: October 8, 2015
    Inventors: Brian Patton, Nicolas Fortescue, Piotr Krzysztof Swigon, John Ayres, Maximilian RUPPANER, Elizabeth Ireland Powers, Eva-Lotta Lamm, Alan Michael Stokes
  • Patent number: 9087156
    Abstract: Implementations of the disclosed subject matter provide systems and methods for providing one or more versions of an application to one or more subsets of users based on measured performance of the one or more versions of the application. A method may include providing a first version of an application to a first subset of users of the application. Next, performance of the first version of the application may be measured and a second subset of users of the application may be selected based on the performance of the first version of the application. As a result, a second version of the application may be provided to the second subset of users of the application.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: July 21, 2015
    Assignee: Google Inc.
    Inventors: Brian Patton, Nicolas Fortescue, Piotr Krzysztof Swigon, John Ayres, Maximilian Ruppaner, Elizabeth Ireland Powers, Eva-Lotta Lamm, Alan Michael Stokes
  • Publication number: 20150143345
    Abstract: Implementations of the disclosed subject matter provide systems and methods for providing one or more versions of an application to one or more subsets of users based on measured performance of the one or more versions of the application. A method may include providing a first version of an application to a first subset of users of the application. Next, performance of the first version of the application may be measured and a second subset of users of the application may be selected based on the performance of the first version of the application. As a result, a second version of the application may be provided to the second subset of users of the application.
    Type: Application
    Filed: November 15, 2013
    Publication date: May 21, 2015
    Applicant: Google Inc.
    Inventors: Brian Patton, Nicolas Fortescue, Piotr Krzysztof Swigon, John Ayres, Maximilian RUPPANER, Elizabeth Ireland Powers, Eva-Lotta Lamm, Alan Michael Stokes
  • Publication number: 20070040785
    Abstract: An active matrix array device has a plurality of matrix array elements (100), each of which have a first capacitive device (120) coupled to a charging conductor (32m) via a first switch (100) being responsive to an addressing conductor (22n). In addition, the matrix array elements (100) comprise a second capacitive device (130) coupled to the first capacitive device (120) via a second switch (112) being responsive to en enable signal provided via an enable conductor (42n). The second capacitive device (130) is coupled to the control terminal of a third switch (114), which is coupled between the first capacitive device (120) and a potential source like the charging conductor (32m). The second capacitive device (130) is used to sample the voltage across the first capacitive device (120), which enables the third switch (114) if of an appropriate value, thus providing a conductive path between the first capacitive device (120) and the potential source.
    Type: Application
    Filed: March 30, 2004
    Publication date: February 22, 2007
    Applicant: KONINKLIJKE PHILIPS ELECTROINCS N.V.
    Inventors: Martin Edwards, John Ayres
  • Publication number: 20060232577
    Abstract: An amplification circuit comprises a capacitor arrangement (42) and a switching arrangement The capacitor arrangement has a first capacitor (C2) which has a voltage-dependent capacitance and a second capacitor (C1) (which may also be voltage-dependent). The circuit is operable in two modes, a first mode in which the input voltage is provided to one terminal of at least the first capacitor, and a second mode in which the switching arrangement causes charge to be redistributed between the first and second capacitors such that the voltage across the first capacitor changes to reduce the capacitance of the first capacitor, the output voltage being dependent on the resulting voltage across the first capacitor. The invention uses a voltage controlled capacitance in combination with charge sharing between capacitors, which has the result of providing a voltage amplification characteristic. This arrangement can thus be used for the amplification of an analogue voltage, or the boosting of a fixed level (i.e.
    Type: Application
    Filed: July 30, 2004
    Publication date: October 19, 2006
    Inventors: Martin Edwards, John Ayres
  • Publication number: 20060176102
    Abstract: A charge pump circuit has a voltage increasing stage and a voltage decreasing stage in parallel, and sharing a common input. This shows charge to flow between the stages, so that charge used in the pumping of one stage is recycled to the other stage.
    Type: Application
    Filed: December 24, 2003
    Publication date: August 10, 2006
    Inventors: John Ayres, Keitaro Yamashita
  • Publication number: 20060164363
    Abstract: An active matrix display has a column driver for providing signals to the pixels for driving the display elements, the column driver comprising digital to analogue converter circuitry providing a first number of display element drive levels. Within each pixel, the first number of display element drive levels is converted into a second, greater number, of pixel grey levels. This combines multi-level digital to analogue conversion with in-pixel level generation and enables the complexity of the DACs to be reduced so that they can be integrated onto the display substrate, for example using low temperature polysilicon processing.
    Type: Application
    Filed: September 5, 2003
    Publication date: July 27, 2006
    Applicant: Koninklijke Philips Electronics N.V.
    Inventors: Stephen Battersby, Martin Edwards, John Ayres, Alan Knapp
  • Publication number: 20060050041
    Abstract: An active matrix array device has driver circuitry for providing address signals to the matrix elements and which includes digital to analogue converter circuitry. The driver circuitry is arranged alongside one edge of the array of matrix elements, and comprises a multiple voltage level generator circuit providing a plurality of analogue voltage levels for addressing the matrix elements, with the plurality of levels being provided on outputs distributed substantially along the length of the one edge. A group of switches is associated with, and located at, each output of the voltage level generator circuit and provides signals to an output bus arranged alongside the one edge and having the first number of lines. This architecture enables a reference voltage bus line to be removed by interleaving the voltage selection switches.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 9, 2006
    Inventors: Martin Edwards, John Ayres
  • Publication number: 20050236650
    Abstract: An array device has switching circuits in each pixel for selectively routing one of at least two inputs to a pixel element. Switching transistors are connected between a respective one of the at least two inputs and the pixel element. The timing of the operation of the switching transistors is determined in dependence on the data waveform of at least one of the inputs, and a capacitive connection is provided between the gate of at least one of the switching transistors and an output of the switching transistor. This enables a reduction in the data voltage range which is required to ensure that the switching transistors switch correctly, by using a bootstrapping technique. In particular, by controlling the timing of application of the data signals for switching on or off the switching transistors, the voltage levels of at least one of the input signals can be used to provide capacitive coupling through the respective switching transistor onto the bootstrapping capacitor.
    Type: Application
    Filed: July 16, 2003
    Publication date: October 27, 2005
    Inventors: Martin Edwards, John Ayres
  • Publication number: 20050088589
    Abstract: A matrix display device, for example an AMLCD, has first and second spaced substrates (22, 23) carrying opposed display pixel electrode structures (14, 32, 38) defining a pixel array/display area (20) with the first substrate (22) further carrying outside the display area auxiliary circuitry, for example, comprising row and column drive circuits (40, 42) a signal processing circuit (45) a memory circuit (47), or control logic circuit (46). At least a part of the auxiliary circuitry is electrical shielded to prevent electrical interference problems by an electrically conductive shielding layer(s) (60) carried on a part (50) of the first substrate (23) that extends over the auxiliary circuitry. The shielding layer may conveniently comprise part of an electrode layer (32) deposited on the second substrate and used for the pixel electrode structure.
    Type: Application
    Filed: February 6, 2003
    Publication date: April 28, 2005
    Inventors: Martin Edwards, John Ayres
  • Publication number: 20050087675
    Abstract: A secondary light assembly emits light into an area lit by a primary light source. The secondary light assembly includes a light sensor for sensing light emitted from the primary light source. A secondary light source is operatively connected to the light sensor. A controller is electrically connected to the light sensor and the secondary light source. The controller calculates a rate of change of light emission from the primary light source such that the controller turns the secondary light source on when the rate of change of light emission from the primary light source is above a predetermined rate threshold.
    Type: Application
    Filed: September 8, 2004
    Publication date: April 28, 2005
    Inventor: John Ayres
  • Publication number: 20050048372
    Abstract: An electrode comprising a noble-metal free grid comprising lead, wherein the grid has an essentially PbO free PbO2 coating covering all, or essentially all of the surface of the grid. Also described is a method of forming an electrode, comprising applying an essentially PbO free PbO2 coating to a noble-metal free grid comprising lead, wherein the coating covers all, or essentially all of the surface of the grid.
    Type: Application
    Filed: September 17, 2004
    Publication date: March 3, 2005
    Inventors: Rongrong Chen, John Ayres
  • Patent number: 5810927
    Abstract: The temperature of ink applied to a substrate during printing is controlled by directing air of controlled temperature at the ink by means of an ink temperature controlling device (9). The device comprises a fan (11) and a heater (12) for heating the air propelled at the ink by the fan. The device may include a sensor (22) for monitoring the temperature of the ink in which case the sensor may be operably connected to the fan and/or heater to form a closed loop system.
    Type: Grant
    Filed: January 22, 1996
    Date of Patent: September 22, 1998
    Assignees: Frank Ball Limited, John Ayres
    Inventors: John Ayres, Frank Ball
  • Patent number: 5569514
    Abstract: Sand-based biodegradable articles, such as planar frangible targets and formed three-dimensional tableware and food containers, are disclosed. The articles are made formed of a mixture of sand and a decomposable binder, the binder preferably comprising by weight 30-40% starch, 20-30% salt, 1-3% oil and water. The articles are preferably coated with a decomposable waterproof sealant.
    Type: Grant
    Filed: January 5, 1994
    Date of Patent: October 29, 1996
    Assignee: Nu-Tech & Engineering, Inc.
    Inventor: John Ayres
  • Patent number: 5317119
    Abstract: A disposable food container formed of sand and a decomposable binder. The disposable food containers are suitable for holding, storing and exposing food to heat in both conventional and microwave ovens. The decomposable binders contain 20 to 40% by weight of a binder selected from the group consisting of starch, grain flours and mixtures thereof, 20 to 30% by weight salt, 1 to 3% by weight oil and water. The containers are covered with a coating to prevent the transmission or absorption of liquids.
    Type: Grant
    Filed: April 16, 1992
    Date of Patent: May 31, 1994
    Assignee: Nu-Tech & Engineering, Inc.
    Inventor: John Ayres
  • Patent number: 5108677
    Abstract: The method includes the steps of mixing the sand and the decomposable binder to form a dough-like consistency, forming the dough-like mixture into a sheet. Cutting the sheet into silhouette shapes and then drying the shapes to form a rigid article suitable for a variety of purposes. The preferred article is coated with a decomposable waterproof sealant. Method of forming planar frangible targets as well as formed three-dimensionsl tableware and food containers are disclosed.
    Type: Grant
    Filed: May 1, 1990
    Date of Patent: April 28, 1992
    Inventor: John Ayres