Patents by Inventor John B. BOWLERWELL

John B. BOWLERWELL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154612
    Abstract: The application relates to voltage supply in switched-mode driver integrated circuit (IC). The IC has an output bridge with first and second circuit branches, where each of the circuit branches has an output node (102a, 102b) connected between first and second transistor switches (103a, 104a; 103b, 104b) for selectively connecting the output node to respective first and second voltages (VH, VL). There are discrete first and second IC die contacts (208a, 208b) for receiving the first voltage, and the first and second circuit branches are connected to the first and second IC die contacts respectively. Ancillary circuitry (105) is configured to receive a supply voltage from a voltage supply node voltage which is connected to the first and second IC die contacts via respective first and second respectively matched resistances.
    Type: Application
    Filed: October 10, 2023
    Publication date: May 9, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Kapil SHARMA, Andrew J. HOWLETT, Matthew PETHERBRIDGE, John B. BOWLERWELL, Graeme S. ANGUS, Gordon RUSSELL
  • Publication number: 20240097633
    Abstract: The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: David P. SINGLETON, Andrew J. HOWLETT, John B. BOWLERWELL
  • Patent number: 11881826
    Abstract: The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: January 23, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: David P. Singleton, Andrew J. Howlett, John B. Bowlerwell
  • Publication number: 20240012035
    Abstract: This application relates to methods and apparatus for sensing current in a monitored current path, where the monitored current path is bidirectional such that current can flow in either direction along the monitored current path. A current sensor has first and second sense resistors (401a, 401b) configured to each pass a current corresponding to the current in the monitored current path. The first and second sense resistors are configured to have a matching arrangement, such that current flow through the first sense resistor when current is flowing in one direction in the monitored current path matches current flow through the second sense resistor when current is flowing in the opposite direction in the monitored current path.
    Type: Application
    Filed: July 6, 2023
    Publication date: January 11, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Kapil R. SHARMA, Kathryn R. HOLLAND, Matthew PETHERBRIDGE, Peter HSU, John B. BOWLERWELL
  • Patent number: 11852694
    Abstract: The present disclosure relates to circuitry for detecting connection of a plug of an audio accessory device to a socket of an intermediate cable that is connected to a host device, wherein the plug of the accessory device is of a different type than the socket of the intermediate cable. The circuitry comprises a monitoring unit comprising a first terminal configured to be electrically connected to a first socket contact of the socket that is in electrical contact with a first plug contact of the plug when the plug is fully received in the socket; and a second terminal configured to be electrically connected to a second socket contact of the socket that is in electrical contact with a second plug contact of the plug when the plug is fully received in the socket.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: December 26, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: John A. Breslin, John B. Bowlerwell, Clive R. Graham
  • Patent number: 11843354
    Abstract: The present invention relates to circuitry comprising: interpolation filter circuitry configured to receive a digital input signal and to output an interpolated digital signal; amplifier circuitry configured to generate an output signal based on the interpolated digital signal; and protection circuitry. The protection circuitry is configured to activate in response to detection of a fault condition at an output of the amplifier circuitry. The circuitry further comprises first detection circuitry configured to output a control signal to disable the protection circuitry on detection of a transient signal at an output of the interpolation filter circuitry that is unrelated to a fault.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: December 12, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Pradeep Saminathan, Graeme S. Angus, John B. Bowlerwell
  • Publication number: 20230344351
    Abstract: The present disclosure relates to power converter circuitry, and in particular to power converter circuitry for providing a supply voltage to a load such as amplifier circuitry. In one aspect the invention provides a system comprising: amplifier circuitry; and power converter circuitry for receiving a supply voltage and providing an output voltage to the amplifier circuitry, the power converter circuitry comprising: a control loop for regulating an output voltage of the power converter circuitry in accordance with a target output voltage value; and controller circuitry configured to adjust the target output voltage value if the supply voltage to the power converter circuitry is within a first predefined threshold of a requested output voltage of the power converter circuitry.
    Type: Application
    Filed: April 13, 2023
    Publication date: October 26, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Alastair M. BOOMER, John B. BOWLERWELL, James MUNGER, Andrew J. HOWLETT
  • Publication number: 20230299575
    Abstract: An integrated circuit (IC), comprising: a converter comprising: one or more core devices; and one or more output internal nodes, each internal node coupled to one of the one or more core devices; protection circuitry comprising: one or more isolation switches, each of the one or more isolation switches coupled between a respective one of the one or more internal output nodes and a respective output external pin of the IC, wherein the protection circuitry configured to: monitor a characteristic at each respective external output pin of the IC; and if the characteristic is outside an operating specification of the one or more core devices, open one or more of the one or more isolation switches to isolate one or more of the one or more core devices from the respective external pin of the IC.
    Type: Application
    Filed: March 14, 2023
    Publication date: September 21, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: David P. SINGLETON, Andrew J. HOWLETT, Sharjeel RIAZ, John B. BOWLERWELL
  • Publication number: 20230198396
    Abstract: Circuitry for estimating an inductance of an inductor in power converter circuitry, the circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during an operational cycle of the power converter circuitry; circuitry for generating a ripple current estimate signal, indicative of an estimate of a ripple current in the power converter circuitry; and circuitry for applying the ripple current estimate signal to the peak inductor current signal to generate an average inductor current threshold signal indicative of an estimated average inductor current in the power converter circuitry during the operational cycle, wherein the ripple current estimate signal is based on: a duration of a charging phase of operation of the power converter circuitry; a voltage across the inductor; and an inductance value for the inductor; and wherein the circuitry for generating the ripple current estimate signal is operative to select an inductance value for the inductor for wh
    Type: Application
    Filed: March 21, 2022
    Publication date: June 22, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John B. BOWLERWELL, Alastair M. BOOMER, Holger HAIPLIK, Malcolm BLYTH
  • Patent number: 11500404
    Abstract: The present disclosure relates to circuitry for selecting a bias voltage to output at a bias voltage output node of the circuitry. The circuitry comprises a first circuit node configured to receive a first voltage from a first, unregulated, voltage source and a second circuit node configured to receive a second voltage from a second, regulated, voltage source. A switch arrangement configured to selectively couple the bias voltage output node to the first circuit node or the second circuit node is also provided.
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: November 15, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: John B. Bowlerwell, Andrew J. Howlett, Graeme S. Angus, Andrei Dumitriu
  • Publication number: 20210399691
    Abstract: The present invention relates to circuitry comprising: interpolation filter circuitry configured to receive a digital input signal and to output an interpolated digital signal; amplifier circuitry configured to generate an output signal based on the interpolated digital signal; and protection circuitry. The protection circuitry is configured to activate in response to detection of a fault condition at an output of the amplifier circuitry. The circuitry further comprises first detection circuitry configured to output a control signal to disable the protection circuitry on detection of a transient signal at an output of the interpolation filter circuitry that is unrelated to a fault.
    Type: Application
    Filed: June 14, 2021
    Publication date: December 23, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Pradeep SAMINATHAN, Graeme S. ANGUS, John B. BOWLERWELL
  • Publication number: 20210351753
    Abstract: The present disclosure relates to circuitry for providing an output voltage. The circuitry comprises: voltage generator circuitry configured to provide an output voltage to an output node of the circuitry; current limiter circuitry operable to perform current limiting so as to limit a current supplied at the output node of the circuitry; detection circuitry configured to output a detection signal when a load voltage across a load coupled to the output node of the circuitry reaches a target voltage; and delay circuitry configured to receive the detection signal and to output a control signal to deactivate current limiting by the current limiter circuitry after a predetermined delay period after receiving the detection signal.
    Type: Application
    Filed: April 19, 2021
    Publication date: November 11, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John B. BOWLERWELL, Andrew J. HOWLETT, Saurabh SINGH, Andrew BUIST
  • Publication number: 20210242847
    Abstract: The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.
    Type: Application
    Filed: January 6, 2021
    Publication date: August 5, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: David P. SINGLETON, Andrew J. HOWLETT, John B. BOWLERWELL
  • Publication number: 20210232165
    Abstract: The present disclosure relates to circuitry for selecting a bias voltage to output at a bias voltage output node of the circuitry. The circuitry comprises a first circuit node configured to receive a first voltage from a first, unregulated, voltage source and a second circuit node configured to receive a second voltage from a second, regulated, voltage source. A switch arrangement configured to selectively couple the bias voltage output node to the first circuit node or the second circuit node is also provided.
    Type: Application
    Filed: January 4, 2021
    Publication date: July 29, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John B. BOWLERWELL, Andrew J. HOWLETT, Graeme S. ANGUS, Andrei DUMITRIU
  • Publication number: 20210165055
    Abstract: The present disclosure relates to circuitry for detecting connection of a plug of an audio accessory device to a socket of an intermediate cable that is connected to a host device, wherein the plug of the accessory device is of a different type than the socket of the intermediate cable. The circuitry comprises a monitoring unit comprising a first terminal configured to be electrically connected to a first socket contact of the socket that is in electrical contact with a first plug contact of the plug when the plug is fully received in the socket; and a second terminal configured to be electrically connected to a second socket contact of the socket that is in electrical contact with a second plug contact of the plug when the plug is fully received in the socket.
    Type: Application
    Filed: November 18, 2020
    Publication date: June 3, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John A. BRESLIN, John B. BOWLERWELL, Clive R. GRAHAM