Patents by Inventor John B. Griswell

John B. Griswell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ADAPTIVE FETCH GATING IN MULTITHREADED PROCESSORS, FETCH CONTROL AND METHOD OF CONTROLLING FETCHES
    Publication number: 20080229068
    Abstract: A multithreaded processor, fetch control for a multithreaded processor and a method of fetching in the multithreaded processor. Processor event and use (EU) signals are monitored for downstream pipeline conditions indicating pipeline execution thread states. Instruction cache fetches are skipped for any thread that is incapable of receiving fetched cache contents, e.g., because the thread is full or stalled. Also, consecutive fetches may be selected for the same thread, e.g., on a branch mis-predict. Thus, the processor avoids wasting power on unnecessary or place keeper fetches.
    Type: Application
    Filed: April 21, 2008
    Publication date: September 18, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPERATION
    Inventors: PRADIP BOSE, ALPER BUYUKTOSUNOGLU, RICHARD J. EICKEMEYER, LEE E. EISEN, PHILIP G. EMMA, JOHN B. GRISWELL, ZHIGANG HU, HUNG Q. LE, DOUGLAS R. LOGAN, BALARAM SINHAROY
  • Adaptive fetch gating in multithreaded processors, fetch control and method of controlling fetches
    Patent number: 7392366
    Abstract: A multithreaded processor, fetch control for a multithreaded processor and a method of fetching in the multithreaded processor. Processor event and use (EU) signs are monitored for downstream pipeline conditions indicating pipeline execution thread states. Instruction cache fetches are skipped for any thread that is incapable of receiving fetched cache contents, e.g., because the thread is full or stalled. Also, consecutive fetches may be selected for the same thread, e.g., on a branch mis-predict. Thus, the processor avoids wasting power on unnecessary or place keeper fetches.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: June 24, 2008
    Assignee: International Business Machines Corp.
    Inventors: Pradip Bose, Alper Buyuktosunoglu, Richard J. Eickemeyer, Lee E. Eisen, Philip G. Emma, John B. Griswell, Zhigang Hu, Hung Q. Le, Douglas R. Logan, Balaram Sinharoy
  • ADAPTIVE FETCH GATING IN MULTITHREADED PROCESSORS, FETCH CONTROL AND METHOD OF CONTROLLING FETCHES
    Publication number: 20080133886
    Abstract: A multithreaded processor, fetch control for a multithreaded processor and a method of fetching in the multithreaded processor. Processor event and use (EU) signals are monitored for downstream pipeline conditions indicating pipeline execution thread states. Instruction cache fetches are skipped for any thread that is incapable of receiving fetched cache contents, e.g., because the thread is full or stalled. Also, consecutive fetches may be selected for the same thread, e.g., on a branch mis-predict. Thus, the processor avoids wasting power on unnecessary or place keeper fetches.
    Type: Application
    Filed: October 30, 2007
    Publication date: June 5, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: PRADIP BOSE, ALPER BUYUKTOSUNOGLU, RICHARD J. EICKEMEYER, LEE E. EISEN, PHILIP G. EMMA, JOHN B. GRISWELL, ZHIGANG HU, HUNG Q. LE, DOUGLAS R. LOGAN, BALARAM SINHAROY