Patents by Inventor John Bayruns

John Bayruns has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10566449
    Abstract: The present invention is a FET having a p-doped or acceptor-doped layer underneath a FET channel to enable E/D Mode operation. A FET threshold voltage is tunable through a voltage applied to the p-doped layer via a metal contact such as a threshold-control terminal (TCT). The present invention has a dual E/D mode operation of a single FET device, and also a dual E/D mode operation with a single-polarity positive power supply voltage. The FET of the present invention is fabricated to enable dual enhancement-mode/depletion-mode (E-Mode/D-Mode) high electron mobility transistors (HEMTs), to enable dual E/D Mode operation by incorporating a p-doped or acceptor doped region underneath the channel, to achieve a tunable threshold voltage by varying the bias voltage on a fourth terminal called the threshold-control terminal (TCT) that contacts the p-doped layer, and to enable Dual E/D-Mode operation of a HEMT with a single-polarity positive power supply voltage.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: February 18, 2020
    Assignee: Duet Microelectronics, Inc.
    Inventors: John Bayruns, Robert J. Bayruns, Ashok T. Ramu
  • Publication number: 20190326425
    Abstract: The present invention is a FET having a p-doped or acceptor-doped layer underneath a FET channel to enable E/D Mode operation. A FET threshold voltage is tunable through a voltage applied to the p-doped layer via a metal contact such as a threshold-control terminal (TCT). The present invention has a dual E/D mode operation of a single FET device, and also a dual E/D mode operation with a single-polarity positive power supply voltage. The FET of the present invention is fabricated to enable dual enhancement-mode/depletion-mode (E-Mode/D-Mode) high electron mobility transistors (HEMTs), to enable dual E/D Mode operation by incorporating a p-doped or acceptor doped region underneath the channel, to achieve a tunable threshold voltage by varying the bias voltage on a fourth terminal called the threshold-control terminal (TCT) that contacts the p-doped layer, and to enable Dual E/D-Mode operation of a HEMT with a single-polarity positive power supply voltage.
    Type: Application
    Filed: April 20, 2018
    Publication date: October 24, 2019
    Applicant: DUET MICROELECTRONICS LLC
    Inventors: John Bayruns, Robert J. Bayruns, Ashok T. Ramu
  • Patent number: 10347738
    Abstract: Fabrication of a dual enhancement-mode/depletion-mode (E-Mode/D-Mode) high electron mobility transistor (HEMT) called a threshold control terminal HEMT (TCT-HEMT) is performed which reduces capacitance between the TCT electrode and the source and drain electrodes of a TCT-HEMT, since such a capacitance may be parasitic, and which fabricates a TCT-HEMT capable of high-frequency operation. A method for fabricating a field-effect transistor (FET) includes: providing a substrate; disposing a back barrier on the substrate to form a base stack; forming a doped layer on the base stack; grow additional layers, including a threshold-control terminal (TCT) access layer; etch a pattern in at least one of the doped layer and the additional layers; and disposing a TCT contact on the TCT access layer.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: July 9, 2019
    Assignee: Duet Microelectronics, Inc.
    Inventors: Ashok T. Ramu, Keun-Yong Ban, John Bayruns, Robert J. Bayruns
  • Patent number: 7830456
    Abstract: A system and method for frequency conversion in a frequency-conversion receiver is disclosed. The frequency-conversion receiver receives input RF signals carrying multiple channels. The frequency-conversion receiver converts the input RF signals to a wide IF band. The IF band is further processed by dividing the IF band into one or more frequency segments or by selecting a wideband frequency segment from the IF band. The wideband frequency segment or the one or more frequency segments are further down-converted, filtered and amplified to provide desired output IF signals, based on the number of channels required in the output IF signals.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: November 9, 2010
    Assignee: Anadigics, Inc
    Inventors: Rajah Vysyaraju, Julio Canelo, Charles Armour, John Bayruns, Hakan Leblebicioglu
  • Publication number: 20070197185
    Abstract: The invention provides a broadband tuner with a reduced odd harmonic mixing and a method for reducing odd harmonic mixing in the broadband tuner. The broadband tuner includes an arrangement of one or more filters, a plurality of mixers and one or more adders. The plurality of mixers mix a plurality of input Radio Frequency (RF) signals with one or more Local Oscillator (LO) signals, to generate a plurality of mixing products. The LO signals may be square wave LO signals with predefined amplitude coefficients and phases. The plurality of mixing products are then added by the adders to reduce mixing of the odd harmonics of the LO signals.
    Type: Application
    Filed: February 23, 2006
    Publication date: August 23, 2007
    Inventor: John Bayruns
  • Publication number: 20070194839
    Abstract: The invention provides a system for providing tunable balanced loss compensation in an electronic filter. Tunable balanced loss compensation is provided by using cross-connected balanced transconductors and self-connected balanced transconductors. The cross-connected balanced transconductors and the self-connected transconductors compensate the unbalanced loss across the electronic filter. The self-connected balanced transconductors compensate the balanced loss across the electronic filter. Further, the cross-connected and the self-connected balanced transconductors are tunable by adjusting the values of their transconductances, thereby providing tunable balanced loss compensation.
    Type: Application
    Filed: February 23, 2006
    Publication date: August 23, 2007
    Inventor: John Bayruns
  • Publication number: 20070093228
    Abstract: The invention provides a system and method for tuning broadband signals by using post mixer I/Q equalization. An Image Rejection Mixer (IRM) is used for mixing Radio Frequency (RF) signals and rejecting image signals from the desired RF signals. The IRM includes an I/Q mixer and a filter. The I and Q paths resulting from the mixing operation in the I/Q mixer are equalized in amplitude and phase by an I/Q equalizer. Thereafter, the image signals are rejected from the desired RF signals using the filter.
    Type: Application
    Filed: October 20, 2005
    Publication date: April 26, 2007
    Inventor: John Bayruns