Abstract: A method of controlling an agricultural facility for housing a plurality of animals includes the step of regulating the environment within the agricultural facility with an automated building operational system. An automated thermal event controller is operationally coupled with the automated building operational system and generates a thermal event signal in response to a thermal event in progress, whereby the automated thermal event controller, upon receipt of the thermal event signal indicating that the thermal event is in progress, activates an alarm state. In the alarm state, the automated thermal event controller: sends an alarm signal to a system administrator; places the automated building operational system in a safety-mode condition for a first predetermined time interval; and places the automated building operational system in a normal-mode operational condition after the first predetermined time interval and if a confirmatory signal is not yet then received from the system administrator.

Abstract: A method of controlling an agricultural facility for housing a plurality of animals includes the step of regulating the environment within the agricultural facility with an automated building operational system. An automated thermal event controller is operationally coupled with the automated building operational system and generates a thermal event signal in response to a thermal event in progress, whereby the automated thermal event controller, upon receipt of the thermal event signal indicating that the thermal event is in progress, activates an alarm state. In the alarm state, the automated thermal event controller: sends an alarm signal to a system administrator; places the automated building operational system in a safety-mode condition for a first predetermined time interval; and places the automated building operational system in a normal-mode operational condition after the first predetermined time interval and if a confirmatory signal is not yet then received from the system administrator.

Abstract: A semiconductor device is provided, the semiconductor device comprising a substrate and a first semiconductor fin and a second semiconductor fin disposed over the substrate. The first and second semiconductor fins each having an upper portion and a width. Epitaxial structures are disposed over the upper portions of the first and second semiconductor fins. The upper portions of the first and second semiconductor fins and the epitaxial structures provide an active layer. A metal structure is positioned between the active layer and the substrate. The metal structure extends at least across the widths of the first and second semiconductor fins and a separation distance between the fins. A first isolation material separates the metal structure from the active layer. A second isolation material separates the metal structure from the substrate. A contact electrically connects the metal structure to the epitaxial structures.

Abstract: A semiconductor device is provided, the semiconductor device comprising a substrate and a first semiconductor fin and a second semiconductor fin disposed over the substrate. The first and second semiconductor fins each having an upper portion and a width. Epitaxial structures are disposed over the upper portions of the first and second semiconductor fins. The upper portions of the first and second semiconductor fins and the epitaxial structures provide an active layer. A metal structure is positioned between the active layer and the substrate. The metal structure extends at least across the widths of the first and second semiconductor fins and a separation distance between the fins. A first isolation material separates the metal structure from the active layer. A second isolation material separates the metal structure from the substrate. A contact electrically connects the metal structure to the epitaxial structures.

Abstract: A switch conversion apparatus including an interface device, a mounting plate configured to mount to a toggle switch and including at least one aperture for receiving a toggle arm of a toggle switch, and an actuator plate configured to slidably engage the mounting plate and including at least one aperture for receiving and engaging a toggle arm of a toggle switch when engaged by the interface device so as to transition the state of the switch. Other embodiments of a switch conversion apparatus include one or more mechanical, electrical, and/or pneumatic timers.

Abstract: Formation of a bottom junction in vertical FET devices may include, for instance, providing an intermediate semiconductor structure comprising a semiconductor substrate, a fin disposed on the semiconductor substrate. The fin has a top surface, spaced-apart vertical sides. A mask is disposed over the top surface of the fin, and at least one is disposed over the vertical sides of the fin. Portions of the substrate are removed to define spaced-apart recesses each extending below a respective one of the spacers. Semiconductor material is grown, such as epitaxially grown, in the recesses.

Abstract: Formation of a bottom junction in vertical FET devices may include, for instance, providing an intermediate semiconductor structure comprising a semiconductor substrate, a fin disposed on the semiconductor substrate. The fin has a top surface, spaced-apart vertical sides. A mask is disposed over the top surface of the fin, and at least one is disposed over the vertical sides of the fin. Portions of the substrate are removed to define spaced-apart recesses each extending below a respective one of the spacers. Semiconductor material is grown, such as epitaxially grown, in the recesses.

Abstract: Formation of a bottom junction in vertical FET devices may include, for instance, providing an intermediate semiconductor structure comprising a semiconductor substrate, a fin disposed on the semiconductor substrate. The fin has a top surface, spaced-apart vertical sides. A mask is disposed over the top surface of the fin, and at least one is disposed over the vertical sides of the fin. Portions of the substrate are removed to define spaced-apart recesses each extending below a respective one of the spacers. Semiconductor material is grown, such as epitaxially grown, in the recesses.

Abstract: Formation of a bottom junction in vertical FET devices may include, for instance, providing an intermediate semiconductor structure comprising a semiconductor substrate, a fin disposed on the semiconductor substrate. The fin has a top surface, spaced-apart vertical sides. A mask is disposed over the top surface of the fin, and at least one is disposed over the vertical sides of the fin. Portions of the substrate are removed to define spaced-apart recesses each extending below a respective one of the spacers. Semiconductor material is grown, such as epitaxially grown, in the recesses.

Abstract: A device, method, and system may remotely monitor one or more subsystems in a terrestrial vehicle. In one embodiment, a method and system may schedule maintenance and order replacement parts after comparing the reported data with threshold data. In one embodiment, stake-holders, law enforcement entities, government agencies, and national security organizations may access the reported data. In one embodiment, a modular device may monitor vehicle subsystems, vehicle environmental data, a driver's heart beat, a driver's eye activity, a driver's head position, vehicle environmental data, and a driver's ID data.

Abstract: In one embodiment, a networking device comprises a first plurality of antenna means, a second plurality of antenna means, and means for controlling the first and second pluralities of antenna means to direct a communication towards a neighbor node of the device.

Abstract: A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.

Abstract: A method of reducing current leakage in three-dimensional semiconductor devices due to short-channel effects includes providing a starting semiconductor structure, the structure including a semiconductor substrate having a n-type device region and a p-type device region, the p-type device region including an upper layer of p-type semiconductor material, a hard mask layer over both regions, and a mask over the structure for patterning at least one fin in each region. The method further includes creating partial fin(s) in each region from the starting semiconductor structure, creating a conformal liner over the structure, creating a punch-through-stop (PTS) in each region, causing each PTS to diffuse across a top portion of the substrate, and creating full fin(s) in each region from the partial fin(s).

Abstract: Methods for self-aligned gate-first VFETs using gate-spacer recess and the resulting devices are disclosed.

Abstract: A method of reducing current leakage in three-dimensional semiconductor devices due to short-channel effects includes providing a starting semiconductor structure, the structure including a semiconductor substrate having a n-type device region and a p-type device region, the p-type device region including an upper layer of p-type semiconductor material, a hard mask layer over both regions, and a mask over the structure for patterning at least one fin in each region. The method further includes creating partial fin(s) in each region from the starting semiconductor structure, creating a conformal liner over the structure, creating a punch-through-stop (PTS) in each region, causing each PTS to diffuse across a top portion of the substrate, and creating full fin(s) in each region from the partial fin(s).

Abstract: A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.