Patents by Inventor John C. Bean

John C. Bean has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10297707
    Abstract: A photovoltaic structure for absorption from the solar spectrum, includes a light transmitting substrate layer, a transparent electrode layer on the substrate layer, a direct band-gap, wide band-gap, nanocrystalline or microcrystalline, think film semiconducting first layer on the transparent electrode layer, a second think film layer comprising a narrow band-gap semiconductor on the first layer a second electrode layer on the second think film layer, and a protective layer on the second electrode layer. The structure has a hetero-structure at the boundary between the wide-band-gap layer and the second thin film layer. The second layer can be chalcogenide salt having an average thickness of 0.4 to 1.2 ?m, and preferably an average thickness of 0.5 to 0.6 ?m. The chalcogenide salt layer is a lead chalcogenide, such as a nanocrystaline lead sulfide, nanocrystalline lead selenide, or a nanocrystalline lead telluride.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: May 21, 2019
    Inventors: Tatiana Globus, Pineas Paxton Marshall, Boris Gelmont, Lloyd Harriott, Naser Alijabbari, John C Bean, Joe C Campbell
  • Patent number: 5244749
    Abstract: We have found a way to, e.g., substantially increase the number of layers in a pseudomorphic strained layer semiconductor mirror over the number obtainable in an analogous conventional mirror, making it possible to obtain pseudomorphic strained layer mirrors of increased reflectance. Such a pseudomorphic mirror consists of alternating layers of a first and a second semiconductor material (e.g., Ge.sub.x Si.sub.1-x /Si), of thickness t.sub.1 and t.sub.2, and refractive index n.sub.1 and n.sub.2, respectively, with the number of layer pairs chosen such that the mirror thickness is less than or equal to the "critical thickness" L.sub.c. For thicknesses >L.sub.c the mirror will contain dislocations.An article according to the invention comprises a mirror whose layer thicknesses are chosen such that n.sub.1 t.sub.1 .noteq.n.sub.2 t.sub.2, with n.sub.1 t.sub.1 +n.sub.2 t.sub.2 =p.lambda./2, (p being an odd integer, typically 1). In other words, the optical thickness of the layers is not the conventional p.
    Type: Grant
    Filed: August 3, 1992
    Date of Patent: September 14, 1993
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, David L. Windt
  • Patent number: 5134090
    Abstract: A method of producing patterned epitaxial silicon films and devices fabricated thereby is described. The method forms a first layer of a refractory material on a substrate and pattern delineates the first layer. Silicon is then deposited at a temperature within the range between 400 degrees C. and 700 degrees C. and the polycrystalline material that forms is removed.
    Type: Grant
    Filed: June 12, 1989
    Date of Patent: July 28, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, George A. Rozgonyi
  • Patent number: 5096840
    Abstract: The inventive method of making a poly-Si emitter transistor (PET) comprises opening an emitter window in a dielectric (typically SiO.sub.2) layer, and depositing onto the thus exposed surface and/or into the single crystal Si material that underlies the exposed surface at least one atomic species. This deposition step is following by the conventional poly-Si deposition, dopant implantation and "drive-in". In a currently preferred embodiment the novel deposition step comprises a low dose, low energy As implantation (5.times.10.sup.13 -2.times.10.sup.15 atoms/cm.sup.2, 0.1-5 keV). The novel method can result in significantly improved device characteristics, e.g., in a doubling of h.sub.FE, as compared to analogous prior art PETs.
    Type: Grant
    Filed: August 15, 1990
    Date of Patent: March 17, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, Gregg S. Higashi, Bahram Jalali-Farahani, Clifford A. King
  • Patent number: 5091767
    Abstract: Disclosed are strained layer heteroepitaxial structures (e.g., GeSi/Si) that can have low threading dislocation density as well as a substantially planar surface. Furthermore, a large fraction (e.g., >90%) of the total surface are of the structure can be available for device processing. These advantageous features are achieved through utilization of novel "dislocation sinks" on or in the substrate whose height parameter h is less than or about equal to the thickness of the strained heteroepitaxial layer on the substrate. Exemplarily, h.gtoreq.h.sub.c, where h.sub.c is the critical thickness associated with misfit dislocation generation in the substrate/overlayer combination.
    Type: Grant
    Filed: March 18, 1991
    Date of Patent: February 25, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, Gregg S. Higashi, Robert Hull, Justin L. Peticolas
  • Patent number: 4879256
    Abstract: An ordered-disordered transition is observed in semiconductor alloys which enables either the ordered or disordered structure to be produced.
    Type: Grant
    Filed: March 28, 1989
    Date of Patent: November 7, 1989
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, Abbas Ourmazd
  • Patent number: 4861393
    Abstract: A molecular beam epitaxy method of growing Ge.sub.x Si.sub.1-x films on silicon substrate is described. Semiconductor heterostructures using Ge.sub.x Si.sub.1-x layers grown on either Ge or Si substrates are described.
    Type: Grant
    Filed: May 28, 1987
    Date of Patent: August 29, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: John C. Bean, Leonard C. Feldman, Anthony T. Fiory
  • Patent number: 4772924
    Abstract: A strained layer superlattice comprising Ge.sub.x Si.sub.1-x layers interleaved with Si layers is an excellent photodetector at infrared wavelengths due to the large shift in bandgap caused by the strain in the superlattice.
    Type: Grant
    Filed: November 25, 1987
    Date of Patent: September 20, 1988
    Inventors: John C. Bean, David V. Lang, Thomas P. Pearsall, Roosevelt People, Henryk Temkin
  • Patent number: 4725870
    Abstract: A photodetector, comprising a Ge.sub.x Si.sub.1-x superlattice region between two silicon cladding layers in which the Ge.sub.x Si.sub.1-x layers absorb light, is described.
    Type: Grant
    Filed: November 18, 1985
    Date of Patent: February 16, 1988
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: John C. Bean, Sergey Luryi, Thomas P. Pearsall
  • Patent number: 4681773
    Abstract: Apparatus is described which is especially well suited for simultaneous molecular beam epitaxy of materials, such as silicon, on a plurality of substrates.
    Type: Grant
    Filed: April 4, 1986
    Date of Patent: July 21, 1987
    Assignee: American Telephone and Telegraph Company AT&T Bell Laboratories
    Inventor: John C. Bean
  • Patent number: 4661829
    Abstract: An ordered-disordered transition is observed in semiconductor alloys which enables either the ordered or disordered structure to be produced.
    Type: Grant
    Filed: June 5, 1985
    Date of Patent: April 28, 1987
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: John C. Bean, Abbas Ourmazd
  • Patent number: 4554045
    Abstract: Described is a method for producing semiconductor heterostructures incorporating a metal layer. The metal layer, typically a metal-silicide, can be produced by, e.g., co-deposition or reaction with the substrate. The resulting silicide is typically epitaxial and of high crystalline perfection.
    Type: Grant
    Filed: November 29, 1982
    Date of Patent: November 19, 1985
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, Kin-Chung R. Chiu, John M. Poate
  • Patent number: 4529455
    Abstract: A molecular beam epitaxy method of growing Ge.sub.x Si.sub.1-x films on silicon substrate is described.
    Type: Grant
    Filed: October 28, 1983
    Date of Patent: July 16, 1985
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, Leonard C. Feldman, Anthony T. Fiory
  • Patent number: 4514748
    Abstract: Devices useful, for example, as detectors in telecommunications systems have been formed utilizing a specific structure. In particular, a p-i-n device is fabricated on a silicon substrate having the necessary circuitry for signal processing. This p-i-n device is produced by depositing an intermediary region having a compositional gradient on this substrate and forming a germanium based p-i-n diode on the intermediary region.
    Type: Grant
    Filed: November 21, 1983
    Date of Patent: April 30, 1985
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, Alexander Kastalsky, Sergey Luryi
  • Patent number: 4492971
    Abstract: Described are semiconductor heterostructures incorporating a metal layer. Devices based on the heterostructures are described, as are techniques for preparing the heterostructures. Specific embodiments wherein the metal layer is a metal silicide are detailed, and hot electron devices using this structure are analyzed briefly.
    Type: Grant
    Filed: June 5, 1980
    Date of Patent: January 8, 1985
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, Kin-Chung R. Chiu, John M. Poate
  • Patent number: RE33693
    Abstract: An ordered-disordered transition is observed in semiconductor alloys which enables either the ordered or disordered structure to be produced.
    Type: Grant
    Filed: June 8, 1990
    Date of Patent: September 17, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, Abbas Ourmazd