Abstract: An apparatus and method for verifying a semiconductor process model. The apparatus consists of an atomic force microscope (AFM), a semiconductor process model and a model updater. The AFM measures an actual cross sectional profile of a submicron semiconductor device feature created by an IC processing step which could be photolithography. The semiconductor process model predicts the feature's cross sectional profile under a set of model conditions specified to match the actual conditions under which the IC processing step took place. The semiconductor process model is driven by a set of model parameters that relate feature profiles to processing conditions and details of the processing step being modelled. The model updater adjusts, if necessary, the model parameters of the semiconductor process model so that the predicted profile more closely approximates the actual cross sectional profile.

Abstract: An interface having low resistance is formed between a single crystal silicon surface and deposited silicon. Before deposition of the silicon, the oxide or nitride layer covering the surface is removed in conventional fashion. The exposed surface is then pre-treated with a plasma etch containing SF.sub.6. Because fluorine is more electro-negative than oxygen, fluorine atoms adhere to the exposed single crystal silicon surface, where their presence prevents reoxidation. Silicon is then deposited on the surface by thermal decomposition of silane, during which deposition the fluorine atoms form silicon-tetrafluoride, which gas is evacuated during a normal out-gas cycle. The resultant interface, which may be an emitter-base junction, exhibits an effective resistance of only a few ohms.