Patents by Inventor John C. Ehmke
John C. Ehmke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230238234Abstract: In some examples, a device comprises a wafer chuck, a member having a surface facing the wafer chuck, a blade supported by the surface, a first vacuum nozzle extending through the member and having a first vacuum orifice facing a same direction as the surface, and a second vacuum nozzle extending through the member and having a second vacuum orifice facing the same direction as the surface. The first and second vacuum orifices are on opposing sides of the blade.Type: ApplicationFiled: July 29, 2022Publication date: July 27, 2023Inventors: Andrew NELSON, John C. EHMKE, Daryl R. KOEHL, Nathan BAYS
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Patent number: 9966194Abstract: A MEMs actuator device and method of forming includes arrays of actuator elements. Each actuator element has a moveable top plate and a bottom plate. The top plate includes a central membrane member and a cantilever spring for movement of the central membrane member. The bottom plate consists of two RF signal lines extending under the central membrane member. A MEMs electrostatic actuator device includes a CMOS wafer, a MEMs wafer, and a ball bond assembly. Interconnections are made from a ball bond to an associated through-silicon-via (TSV) that extends through the MEMS wafer. A RF signal path includes a ball bond electrically connected through a TSV and to a horizontal feed bar and from the first horizontal feed bar vertically into each column of the array. A metal bond ring extends between the CMOS wafer and the MEMS wafer. An RF grounding loop is completed from a ground shield overlying the array to the metal bond ring, a TSV and to a ball bond.Type: GrantFiled: December 20, 2016Date of Patent: May 8, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Arun Gupta, William C. McDonald, Adam Fruehling, Ivan Kmecko, Lance Barron, Divyanshu Agrawal, Arthur M. Turner, John C. Ehmke
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Publication number: 20170098509Abstract: A MEMs actuator device and method of forming includes arrays of actuator elements. Each actuator element has a moveable top plate and a bottom plate. The top plate includes a central membrane member and a cantilever spring for movement of the central membrane member. The bottom plate consists of two RF signal lines extending under the central membrane member. A MEMs electrostatic actuator device includes a CMOS wafer, a MEMs wafer, and a ball bond assembly. Interconnections are made from a ball bond to an associated through-silicon-via (TSV) that extends through the MEMS wafer. A RF signal path includes a ball bond electrically connected through a TSV and to a horizontal feed bar and from the first horizontal feed bar vertically into each column of the array. A metal bond ring extends between the CMOS wafer and the MEMS wafer. An RF grounding loop is completed from a ground shield overlying the array to the metal bond ring, a TSV and to a ball bond.Type: ApplicationFiled: December 20, 2016Publication date: April 6, 2017Inventors: Arun Gupta, William C. McDonald, Adam Fruehling, Ivan Kmecko, Lance Barron, Divyanshu Agrawal, Arthur M. Turner, John C. Ehmke
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Publication number: 20160176701Abstract: A MEMs actuator device and method of forming includes arrays of actuator elements. Each actuator element has a moveable top plate and a bottom plate. The top plate includes a central membrane member and a cantilever spring for movement of the central membrane member. The bottom plate consists of two RF signal lines extending under the central membrane member. A MEMs electrostatic actuator device includes a CMOS wafer, a MEMs wafer, and a ball bond assembly. Interconnections are made from a ball bond to an associated through-silicon-via (TSV) that extends through the MEMS wafer. A RF signal path includes a ball bond electrically connected through a TSV and to a horizontal feed bar and from the first horizontal feed bar vertically into each column of the array. A metal bond ring extends between the CMOS wafer and the MEMS wafer. An RF grounding loop is completed from a ground shield overlying the array to the metal bond ring, a TSV and to a ball bond.Type: ApplicationFiled: February 15, 2016Publication date: June 23, 2016Inventors: Arun Gupta, William C. McDonald, Adam Fruehling, Ivan Kmecko, Lance Barron, Divyanshu Agrawal, Arthur M. Turner, John C. Ehmke, James C. Baker
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Patent number: 9140898Abstract: A hermetic package comprising a substrate (110) having a surface with a MEMS structure (101) of a first height (102), the substrate hermetically sealed to a cap (120) forming a cavity over the MEMS structure; the cap attached to the substrate surface by a vertical stack (130) of metal layers adhering to the substrate surface and to the cap, the stack having a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance (140); the stack having a bottom metal seed film (131) adhering to the substrate with a first width (131a), and further a top metal seed film (132) adhering to the cap with a second width (132a) smaller than the first width, the top metal seed film tied to a layer (135) including gold-indium intermetallic compounds, layer (135) having a height greater than the first height.Type: GrantFiled: March 15, 2013Date of Patent: September 22, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: John C. Ehmke, Virgil C. Ararao, Toby R. Linder, Lance W. Barron
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Publication number: 20140268295Abstract: A hermetic package comprising a substrate (110) having a surface with a MEMS structure (101) of a first height (102), the substrate hermetically sealed to a cap (120) forming a cavity over the MEMS structure; the cap attached to the substrate surface by a vertical stack (130) of metal layers adhering to the substrate surface and to the cap, the stack having a continuous outline surrounding the MEMS structure while spaced from the MEMS structure by a distance (140); the stack having a bottom metal seed film (131) adhering to the substrate with a first width (131a), and further a top metal seed film (132) adhering to the cap with a second width (132a) smaller than the first width, the top metal seed film tied to a layer (135) including gold-indium intermetallic compounds, layer (135) having a height greater than the first height.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Inventors: John C. Ehmke, Virgil C. Ararao, Toby R. Linder, Lance W. Barron
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Patent number: 7977208Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.Type: GrantFiled: December 30, 2010Date of Patent: July 12, 2011Assignee: Raytheon CompanyInventors: Billy D. Ables, John C. Ehmke, Roland W. Gooch
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Publication number: 20110097845Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.Type: ApplicationFiled: December 30, 2010Publication date: April 28, 2011Applicant: Raytheon CompanyInventors: Billy D. Ables, John C. Ehmke, Roland W. Gooch
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Patent number: 7867874Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.Type: GrantFiled: May 19, 2009Date of Patent: January 11, 2011Assignee: Raytheon CompanyInventors: Billy D. Ables, John C. Ehmke, Roland W. Gooch
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Publication number: 20090227068Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.Type: ApplicationFiled: May 19, 2009Publication date: September 10, 2009Applicant: Raytheon CompanyInventors: Billy D. Ables, John C. Ehmke, Roland W. Gooch
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Patent number: 7535093Abstract: A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.Type: GrantFiled: March 8, 2002Date of Patent: May 19, 2009Assignee: Raytheon CompanyInventors: Billy D. Ables, John C. Ehmke, Roland W. Gooch
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Patent number: 6856014Abstract: A method of individually packaging a multiplicity of devices, such as a spatial light modulator, before the multiplicity of devices formed on a substrate wafer are separated. The method and structure comprises individually sealing each device while the device is still part of sealed by the combination interposer wafer and a cover or window wafer. After each device is sealed by the combination interposer wafer and cover wafer, the combination cover wafer is sawed through down to the substrate wafer. The sealed devices may then be fully separated by scoring and breaking the substrate wafer.Type: GrantFiled: December 29, 2003Date of Patent: February 15, 2005Assignee: Texas Instruments IncorporatedInventors: John C. Ehmke, Vincent C. Lopes, John Paul Harris
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Patent number: 6803534Abstract: A micro-electro-mechanical (MEMS) switch (10, 110) has an electrode (22, 122) covered by a dielectric layer (23, 123), and has a flexible conductive membrane (31, 131) which moves between positions spaced from and engaging the dielectric layer. At least one of the membrane and dielectric layer has a textured surface (138) that engages the other thereof in the actuated position. The textured surface reduces the area of physical contact through which electric charge from the membrane can tunnel into and become trapped within the dielectric layer. This reduces the amount of trapped charge that could act to latch the membrane in its actuated position, which in turn effects a significant increase in the operational lifetime of the switch.Type: GrantFiled: May 25, 2001Date of Patent: October 12, 2004Assignee: Raytheon CompanyInventors: Shea Chen, Brandon W. Pillans, John C. Ehmke, Zhimin Jamie Yao
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Patent number: 6700172Abstract: A switch includes a conductive region, a membrane, and a dielectric region. The dielectric region is formed from a dielectric material and is disposed between the membrane and the conductive region. When a sufficient voltage is applied between the conductive region and the membrane, a capacitive coupling between the membrane and the conductive region is effected. The dielectric material has a resistivity sufficiently low to inhibit charge accumulation in the dielectric region during operation of the switch.Type: GrantFiled: December 4, 2001Date of Patent: March 2, 2004Assignee: Raytheon CompanyInventors: John C. Ehmke, Charles L. Goldsmith, Zhimin J. Yao, Susan M. Eshelman
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Patent number: 6633079Abstract: RF MicroElectroMechanical Systems (MEMS) circuitry (15) on a first high resistivity substrate (17) is combined with circuitry (11) on a second low resistivity substrate (13) by overlapping the first high resistivity substrate (17) and MEMS circuitry (15) with the low resistivity substrate (13) and circuitry (11) with the MEMS circuitry (15) facing the second circuitry (11). A dielectric lid (19) is placed over the MEMS circuitry (15) and between the first substrate (17) and second substrate (13) with an inert gas in a gap (21) over the MEMS circuitry (15). Interconnecting conductors (25,31,35,37,39,41) extend perpendicular and through the high resistivity substrate (17) and through the dielectric lid (19) to make electrical connection with the low resistivity substrate (13).Type: GrantFiled: September 10, 2002Date of Patent: October 14, 2003Assignee: Raytheon CompanyInventors: James L. Cheever, Charles L. Goldsmith, John C. Ehmke, Billy D. Ables
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Publication number: 20030047799Abstract: RF MicroElectroMechanical Systems (MEMS) circuitry (15) on a first high resistivity substrate (17) is combined with circuitry (11) on a second low resistivity substrate (13) by overlapping the first high resistivity substrate (17) and MEMS circuitry (15) with the low resistivity substrate (13) and circuitry (11) with the MEMS circuitry (15) facing the second circuitry (11). A dielectric lid (19) is placed over the MEMS circuitry (15) and between the first substrate (17) and second substrate (13) with an inert gas in a gap (21) over the MEMS circuitry (15). Interconnecting conductors (25, 31, 35, 37, 39, 41) extend perpendicular and through the high resistivity substrate (17) and through the dielectric lid (19) to make electrical connection with the low resistivity substrate (13).Type: ApplicationFiled: September 10, 2002Publication date: March 13, 2003Applicant: Raytheon CompanyInventors: James L. Cheever, Charles L. Goldsmith, John C. Ehmke, Billy D. Ables
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Patent number: 6512300Abstract: RF MicroElectroMechanical Systems (MEMs) circuitry(15) on a first high resistivity substrate (17)is combined with circuitry (11) onsecond low-resisitivity substrate (13) by overlapping the first high resisitivity substrate (17)and MEMs circuitry (15) with the low resisitivity substrate(13) and circuitry (11) with the MEMs circuitry (15)facing the second circuitry (11). A dielectric lid (19) is placed over the MEMs circuitry (15)and between the first substrate (17)and second substrate (13)with an inert gas in a gap (21)over the MEMs circuitry (15). Interconnecting conductors (25,31,35,37,39,41) extend perpendicular and through the high resistivity substrate (17)and through the dielectric lid (19) to make electrical connection with the low resisitivity substrate (13).Type: GrantFiled: January 10, 2001Date of Patent: January 28, 2003Assignee: Raytheon CompanyInventors: James L. Cheever, Charles L. Goldsmith, John C. Ehmke, Billy D. Ables
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Publication number: 20030001251Abstract: RF MicroElectroMechanical Systems (MEMs) circuitry(15) on a first high resistivity substrate (17)is combined with circuitry (11) onsecond low-resisitivity substrate (13) by overlapping the first high resisitivity substrate (17)and MEMs circuitry (15) with the low resisitivity substrate(13) and circuitry (11) with the MEMs circuitry (15)facing the second circuitry (11). A dielectric lid (19) is placed over the MEMs circuitry (15)and between the first substrate (17)and second substrate (13)with an inert gas in a gap (21)over the MEMs circuitry (15). Interconnecting conductors (25,31,35,37,39,41) extend perpendicular and through the high resistivity substrate (17)and through the dielectric lid (19) to make electrical connection with the low resisitivity substrate (13).Type: ApplicationFiled: January 10, 2001Publication date: January 2, 2003Inventors: James L. Cheever, Charles L. Goldsmith, John C. Ehmke, Billy D. Ables
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Patent number: 6501431Abstract: An antenna element (10) has two dielectric layers (12, 13), which separate three ground planes (17, 18, 21, 22, 23). The three ground planes have respective slots (26, 27, 28), which collectively define a slotline communicating at an inner end with a balun hole (57) that extends through all of the ground planes and dielectric layers. Two capacitive switches (121) are supported within the balun hole, and each have terminals respectively coupled to the same ground plane on opposite sides of the balun hole. The capacitive switches are independently and selectively operated to dynamically vary the impedance characteristic of the overall balun structure that includes the balun hole and two switch assemblies, and which gives the antenna element good electrical performance over a wide bandwidth. The antenna element includes a stripline (36), and a stripline to a slotline transition exists at the end of the slotline adjacent the balun hole.Type: GrantFiled: September 4, 2001Date of Patent: December 31, 2002Assignee: Raytheon CompanyInventors: James McGlathery Irion, II, R. Thomas Dover, Richard E. Hodges, Allan R. Logan, John C. Ehmke
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Patent number: 6391675Abstract: A switch includes a conductive region, a membrane, and a dielectric region. The dielectric region is formed from a dielectric material and is disposed between the membrane and the conductive region. When a sufficient voltage is applied between the conductive region and the membrane, a capacitive coupling between the membrane and the conductive region is effected. The dielectric material has a resistivity sufficiently low to inhibit charge accumulation in the dielectric region during operation of the switch.Type: GrantFiled: September 13, 1999Date of Patent: May 21, 2002Assignee: Raytheon CompanyInventors: John C. Ehmke, Charles L. Goldsmith, Zhimin J. Yao, Susan M. Eshelman