Abstract: An aircraft wireless communication system includes a headset having an active noise reduction (ANR) microphone, ANR circuitry coupled to the ANR microphone that generates a driver signal in response to the signal from the ANR microphone, a driver coupled to the ANR circuitry that receives the driver signal, a digital receiver coupled to the ANR circuitry, a voice microphone, and an analog transmitter coupled to the voice microphone. The system also includes an aircraft panel interface having an analog receiver that receives wireless signals from the analog transmitter and provides corresponding signals to a wired output configured to connect to an aircraft panel, and a digital transmitter connected to a wired input configured to connect to an aircraft panel and wirelessly transmit corresponding signals to the digital receiver. The system may include a left-to-right cross-feed circuit for selected frequencies to improve speech intelligibility.

Abstract: The advanced management module services in a data processing system are configured to determine the system load and provide an input to the early power off warning detection logic that evaluates the power system state to detect a condition when power resources are insufficient to maintain the write caching storage system power within defined acceptable limits. The early power off warning detection logic generates a notification based on the system load and the available power supply resources to maintain maximum availability and reliability characteristics.

Abstract: In a RAID storage system, a parity value is generated. The storage system includes a RAID adapter, a plurality of disk array processors managing corresponding sets of RAID storage drives, and a connecting fabric. The RAID adapter initiates a parity generation operation, parallel instructions are dispatched for the array processors to each generate a partial parity value from data blocks on drives on respective managed RAID storage drives, the partial parity value is received in the RAID adapter from each array processor, and the partial parity values are combined in the RAID adapter to generate a complete parity value. The parity value may be an actual parity block to be stored on a hard disk drive or may be a reconstructed data block in the event of a failed drive.

Abstract: A method is disclosed to assign addresses to a plurality of data storage devices. The method provides a switch and (N) data storage devices, where each of those (N) data storage devices is interconnected with said switch. The method further establishes (M) device addresses, where (M) is less than (N), and assigns a different one of each of the (M) device addresses to a different one of the (N) data storage devices, such that the (N) data storage devices comprise (M) address-assigned data storage devices and (P) non-address-assigned data storage devices. The method then detects a failure of the (i)th address-assigned data storage device, and transfers the (i)th address from the failed address-assigned data storage device to the (j)th data storage device, where that (j)th data storage device comprises one of the (P) previously non-addressed data storage devices.