Abstract: A more linear duty cycle modulator is made by converting the sine wave bias into a triangle wave bias utilizing a sample and hold circuit as the base band signal is added; on readout, low pass filtering of the high frequency content of the duty cycle modulated waveform, the base band signal is recovered at full amplitude as if saturation recording was being utilized. In a further preferred approach, quadature amplitude modulation and demodulation is utilized.

Abstract: At the conclusion of a track seek operation, handoff to track following servo control is delayed for a short time period during which the drive microprocessor determines if the head has failed to stop at the target track by sensing the occurrence of a predetermined number of track crossing pulses, the detection of which causes iterative generation and application of braking current pulses to the head actuator motor. The amplitude and duration of each braking current pulse is chosen to cause forward motion of the head to be retarded to a predetermined percent of its pre-existing velocity. The microprocessor routine includes provision for iteratively determining when the head has slowed to a velocity which allows the track following servo to acquire control of the head. Once stopped on a track, a short seek is executed to return the head to the desired target track.

Abstract: During the arrival phase of long seeks, e.g. the last six tracks of a seek, and during the entirety of relatively short seeks, e.g. seeks of less than 256 tracks, position mode servo control is employed by locking an actual tracking error feedback signal to a microprocessor-synthesized reference tracking error signal. The position mode servo feedback loop employs a parallel combination of a synchronous demodulator and a phase-frequency detector to achieve good locking performance over the entire frequency spectrum of the synthesized reference tracking error signal.

Abstract: A folding-type A/D converter for converting an analog input signal to an n-bit digital code, the A/D converter having a transfer function dividing the analog input signal into at least n-1 segments, each such n-1 segment having an amplitude level corresponding to the significance of a given bit of the digital code and having linear parts which are mirror images of one another extending over 2.sup.n transition levels L. The A/D converter includes voltage-current converters for converting voltage input signals to current signals, a plurality of circuit stages for producing the linear parts in the current domain in response to the current signals, and a converter for converting the linear parts to a logic 1 or logic 0 of the bits of the digital code.