Patents by Inventor John C. Pereira

John C. Pereira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7463042
    Abstract: An improved probing system is provided for facilitating the making electrical connections to a variety of connectors. The system can be implemented with a plurality of probes capable of being independently translated and pivoted in a plurality of directions under computer control for contacting portions of an electrical connector under test. Probes of the system can be easily reconfigured to test a plurality of different connector types without requiring the use of custom harnesses. A connector having a plurality of contact portions can be received into a gripping mechanism of the probing system. An image of the connector can be captured by a camera of the system and processed by a computing device. Various probes can be positioned to contact the connector to facilitate the performance of tests on the connector, including the application of voltages and currents to the connector, as well as the detection of the same from the connector.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: December 9, 2008
    Assignee: Northrop Grumman Corporation
    Inventor: John C. Pereira
  • Patent number: 4835739
    Abstract: A data storage system comprises a plurality of bubble memory chips each having a major loop and minor loops. At least one of the minor loops of each chip is used to store bad loop data for its respective chip. A system controller controls operation of the bubble memory chips. The system controller includes a chip controller for controlling operation of the bubble memory chips and a random access memory for storing the bad loop data from all of the bubble memory chips, and for supplying bad loop data to the chip controller so that data is placed only on operative loops of the bubble memory chips. A data transfer bus is used for inputting and outputting data from the system controller to a host computer. The system includes a plurality of bubble memory cassettes, each cassette having a predetermined number. Control signals are provided to the bubble memory chips of bubble memory chips so that more than one bubble memory chip is used simultaneously.
    Type: Grant
    Filed: August 4, 1987
    Date of Patent: May 30, 1989
    Assignee: Grumman Aerospace Corporation
    Inventors: Eddie J. Kovacs, John C. Pereira