Patents by Inventor John C. Roberts

John C. Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10096701
    Abstract: Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the strain-absorbing layer to be very thin, have an amorphous structure and be formed of a silicon nitride-based material. The strain-absorbing layer may reduce the number of misfit dislocations formed in the overlying layer (e.g., a nitride-based material layer) which limits formation of other types of defects in other overlying layers (e.g., gallium nitride material region), amongst other advantages. Thus, the presence of the strain-absorbing layer may improve the quality of the gallium nitride material region which can lead to improved device performance.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: October 9, 2018
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
  • Patent number: 8748298
    Abstract: Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the strain-absorbing layer to be very thin, have an amorphous structure and be formed of a silicon nitride-based material. The strain-absorbing layer may reduce the number of misfit dislocations formed in the overlying layer (e.g., a nitride-based material layer) which limits formation of other types of defects in other overlying layers (e.g., gallium nitride material region), amongst other advantages. Thus, the presence of the strain-absorbing layer may improve the quality of the gallium nitride material region which can lead to improved device performance.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: June 10, 2014
    Assignee: International Rectifier Corporation
    Inventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
  • Patent number: 8368117
    Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: February 5, 2013
    Assignee: International Rectifier Corporation
    Inventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
  • Patent number: 7994540
    Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: August 9, 2011
    Assignee: International Rectifier Corporation
    Inventors: Walter H. Nagy, Ricardo M. Borges, Jeffrey D. Brown, Apurva D. Chaudhari, James W. Cook, Jr., Allen W. Hanson, Jerry W. Johnson, Kevin J. Linthicum, Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Sameer Singhal, Robert J. Therrien, Andrei Vescan
  • Publication number: 20100295056
    Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g.
    Type: Application
    Filed: March 29, 2010
    Publication date: November 25, 2010
    Applicant: Nitronex Corporation
    Inventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
  • Patent number: 7791106
    Abstract: Gallium nitride material-based semiconductor structures are provided. In some embodiments, the structures include a composite substrate over which a gallium nitride material region is formed. The gallium nitride material structures may include additional features, such as strain-absorbing layers and/or transition layers, which also promote favorable stress conditions. The reduction in stresses may reduce defect formation and cracking in the gallium nitride material region, as well as reducing warpage of the overall structure. The gallium nitride material-based semiconductor structures may be used in a variety of applications such as transistors (e.g. FETs) Schottky diodes, light emitting diodes, laser diodes, SAW devices, and sensors, amongst others devices.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: September 7, 2010
    Assignee: Nitronex Corporation
    Inventors: Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Kevin J. Linthicum
  • Patent number: 7687827
    Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: March 30, 2010
    Assignee: Nitronex Corporation
    Inventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
  • Publication number: 20100019850
    Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.
    Type: Application
    Filed: July 24, 2009
    Publication date: January 28, 2010
    Applicant: Nitronex Corporation
    Inventors: Walter H. Nagy, Ricardo M. Borges, Jeffrey D. Brown, Apurva D. Chaudhari, James W. Cook, JR., Allen W. Hanson, Jerry W. Johnson, Kevin J. Linthicum, Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Sameer Singhal, Robert J. Therrien, Andrei Vescan
  • Publication number: 20090267188
    Abstract: Gallium nitride material devices and related processes are described. In some embodiments, an N-face of the gallium nitride material region is exposed by removing an underlying region.
    Type: Application
    Filed: June 20, 2008
    Publication date: October 29, 2009
    Applicant: Nitronex Corporation
    Inventors: Edwin L. Piner, Jerry W. Johnson, John C. Roberts
  • Publication number: 20080246058
    Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 9, 2008
    Applicant: Nitronex Corporation
    Inventors: Walter H. Nagy, Ricardo M. Borges, Jeffrey D. Brown, Apurva D. Chaudhari, James W. Cook, Allen W. Hanson, Jerry W. Johnson, Kevin J. Linthicum, Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Sameer Singhal, Robert J. Therrien, Andrei Vescan
  • Publication number: 20080182393
    Abstract: Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the strain-absorbing layer to be very thin, have an amorphous structure and be formed of a silicon nitride-based material. The strain-absorbing layer may reduce the number of misfit dislocations formed in the overlying layer (e.g., a nitride-based material layer) which limits formation of other types of defects in other overlying layers (e.g., gallium nitride material region), amongst other advantages. Thus, the presence of the strain-absorbing layer may improve the quality of the gallium nitride material region which can lead to improved device performance.
    Type: Application
    Filed: January 31, 2008
    Publication date: July 31, 2008
    Applicant: Nitronex Corporation
    Inventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
  • Patent number: 7365374
    Abstract: Gallium nitride material-based semiconductor structures are provided. In some embodiments, the structures include a composite substrate over which a gallium nitride material region is formed. The gallium nitride material structures may include additional features, such as strain-absorbing layers and/or transition layers, which also promote favorable stress conditions. The reduction in stresses may reduce defect formation and cracking in the gallium nitride material region, as well as reducing warpage of the overall structure. The gallium nitride material-based semiconductor structures may be used in a variety of applications such as transistors (e.g. FETs) Schottky diodes, light emitting diodes, laser diodes, SAW devices, and sensors, amongst others devices.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: April 29, 2008
    Assignee: Nitronex Corporation
    Inventors: Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Kevin J. Linthicum
  • Patent number: 7339205
    Abstract: Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the strain-absorbing layer to be very thin, have an amorphous structure and be formed of a silicon nitride-based material. The strain-absorbing layer may reduce the number of misfit dislocations formed in the overlying layer (e.g., a nitride-based material layer) which limits formation of other types of defects in other overlying layers (e.g., gallium nitride material region), amongst other advantages. Thus, the presence of the strain-absorbing layer may improve the quality of the gallium nitride material region which can lead to improved device performance.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: March 4, 2008
    Assignee: Nitronex Corporation
    Inventors: Edwin Lanier Piner, John C. Roberts, Pradeep Rajagopal
  • Patent number: 7297787
    Abstract: An improved process for preparing N6 -substituted aminopurine ribofuranose nucleosides. Compounds of this type are known to be usefull in the prepartation of compounds having activitity at adenosine receptors, e.g. Adenosine A1 receptor. The process comprises the step of reacting a 6-halopurine ribofuranose nucleoside with an amine in the presence of CaCO3 , wherein acid is added to the reaction mixture.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: November 20, 2007
    Assignee: Glaxo Group Limited
    Inventors: Malcolm Berry, John C. Roberts, Shiping Xie
  • Patent number: 7135720
    Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: November 14, 2006
    Assignee: Nitronex Corporation
    Inventors: Walter H. Nagy, Ricardo M. Borges, Jeffrey D. Brown, Apurva D. Chaudhari, James W. Cook, Jr., Allen W. Hanson, Jerry W. Johnson, Kevin J. Linthicum, Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Sameer Singhal, Robert J. Therrien, Andrei Vescan
  • Patent number: 6632306
    Abstract: A method of splicing together the ends of two lengths of drip irrigation tape is disclosed in which a tubular insert having an inner layer of high melting point material and an outer layer of bonding material is placed into the end of a first length of drip irrigation tape so that a portion of the insert projects outwardly from the end of the tape. The end of a second length of drip irrigation tape is then placed over the projecting end of the tubular insert so that the two tape ends are butted up against one another or close to one another. Both lengths of tape are then sealed to the outer bonding layer of the insert.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: October 14, 2003
    Assignee: Roberts Group Holdings, LLC
    Inventors: John C. Roberts, Jack Butler
  • Patent number: 6588680
    Abstract: An irrigation spray device has a substantially cylindrical peg for insertion into a water supply tube. A longitudinal water supply groove extends along the peg, with a water deflecting plate at one end of the groove for deflecting water traveling downwardly along the groove into an outwardly directed spray. The water deflecting plate has a smooth, convex curved or part-conical shape for forming a smooth, continuous, cone-shaped spray. The supply groove may be U-shaped for improved uniformity.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: July 8, 2003
    Assignee: Roberts Group Holdings LLC
    Inventors: Scott G. Cameron, John C. Roberts
  • Publication number: 20030019951
    Abstract: An irrigation spray device has a substantially cylindrical peg for insertion into a water supply tube. A longitudinal water supply groove extends along the peg, with a water deflecting plate at one end of the groove for deflecting water traveling downwardly along the groove into an outwardly directed spray. The water deflecting plate has a smooth, convex curved or part-conical shape for forming a smooth, continuous, cone-shaped spray. The supply groove may be U-shaped for improved uniformity.
    Type: Application
    Filed: July 27, 2001
    Publication date: January 30, 2003
    Inventors: Scott G. Cameron, John C. Roberts
  • Patent number: 6369119
    Abstract: A cationic rosin-in-water emulsion which has been prepared without intermediate isolation of an anionic rosin-in-water emulsion and in which the dispersed rosin phase is stabilized by a cationic polymer derived from a degraded starch, said polymer having a degree of substitution of at least 0.15 quaternary groups per glucose unit.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: April 9, 2002
    Assignee: Rasio Chemcials UK Ltd
    Inventors: John C. Roberts, Martin Phillipson
  • Patent number: D455055
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: April 2, 2002
    Assignee: Roberts Groups Holdings, LLC
    Inventors: John C. Roberts, Jack Butler