Patents by Inventor John C. Roberts
John C. Roberts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10096701Abstract: Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the strain-absorbing layer to be very thin, have an amorphous structure and be formed of a silicon nitride-based material. The strain-absorbing layer may reduce the number of misfit dislocations formed in the overlying layer (e.g., a nitride-based material layer) which limits formation of other types of defects in other overlying layers (e.g., gallium nitride material region), amongst other advantages. Thus, the presence of the strain-absorbing layer may improve the quality of the gallium nitride material region which can lead to improved device performance.Type: GrantFiled: January 31, 2008Date of Patent: October 9, 2018Assignee: Infineon Technologies Americas Corp.Inventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
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Patent number: 8748298Abstract: Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the strain-absorbing layer to be very thin, have an amorphous structure and be formed of a silicon nitride-based material. The strain-absorbing layer may reduce the number of misfit dislocations formed in the overlying layer (e.g., a nitride-based material layer) which limits formation of other types of defects in other overlying layers (e.g., gallium nitride material region), amongst other advantages. Thus, the presence of the strain-absorbing layer may improve the quality of the gallium nitride material region which can lead to improved device performance.Type: GrantFiled: January 31, 2008Date of Patent: June 10, 2014Assignee: International Rectifier CorporationInventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
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Patent number: 8368117Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g.Type: GrantFiled: March 29, 2010Date of Patent: February 5, 2013Assignee: International Rectifier CorporationInventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
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Patent number: 7994540Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.Type: GrantFiled: July 24, 2009Date of Patent: August 9, 2011Assignee: International Rectifier CorporationInventors: Walter H. Nagy, Ricardo M. Borges, Jeffrey D. Brown, Apurva D. Chaudhari, James W. Cook, Jr., Allen W. Hanson, Jerry W. Johnson, Kevin J. Linthicum, Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Sameer Singhal, Robert J. Therrien, Andrei Vescan
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Publication number: 20100295056Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g.Type: ApplicationFiled: March 29, 2010Publication date: November 25, 2010Applicant: Nitronex CorporationInventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
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Patent number: 7791106Abstract: Gallium nitride material-based semiconductor structures are provided. In some embodiments, the structures include a composite substrate over which a gallium nitride material region is formed. The gallium nitride material structures may include additional features, such as strain-absorbing layers and/or transition layers, which also promote favorable stress conditions. The reduction in stresses may reduce defect formation and cracking in the gallium nitride material region, as well as reducing warpage of the overall structure. The gallium nitride material-based semiconductor structures may be used in a variety of applications such as transistors (e.g. FETs) Schottky diodes, light emitting diodes, laser diodes, SAW devices, and sensors, amongst others devices.Type: GrantFiled: February 1, 2008Date of Patent: September 7, 2010Assignee: Nitronex CorporationInventors: Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Kevin J. Linthicum
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Patent number: 7687827Abstract: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the III-nitride material region(s) may be essentially eliminated. The presence of a strain-absorbing layer underlying the III-nitride material region(s) and/or processing conditions can contribute to achieving the low screw dislocation densities. In some embodiments, the III-nitride material region(s) having low dislocation densities include a gallium nitride material region which functions as the active region of the device. The low screw dislocation densities of the active device region (e.g., gallium nitride material region) can lead to improved properties (e.g.Type: GrantFiled: July 7, 2004Date of Patent: March 30, 2010Assignee: Nitronex CorporationInventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
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Publication number: 20100019850Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.Type: ApplicationFiled: July 24, 2009Publication date: January 28, 2010Applicant: Nitronex CorporationInventors: Walter H. Nagy, Ricardo M. Borges, Jeffrey D. Brown, Apurva D. Chaudhari, James W. Cook, JR., Allen W. Hanson, Jerry W. Johnson, Kevin J. Linthicum, Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Sameer Singhal, Robert J. Therrien, Andrei Vescan
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Publication number: 20090267188Abstract: Gallium nitride material devices and related processes are described. In some embodiments, an N-face of the gallium nitride material region is exposed by removing an underlying region.Type: ApplicationFiled: June 20, 2008Publication date: October 29, 2009Applicant: Nitronex CorporationInventors: Edwin L. Piner, Jerry W. Johnson, John C. Roberts
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Publication number: 20080246058Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.Type: ApplicationFiled: March 31, 2008Publication date: October 9, 2008Applicant: Nitronex CorporationInventors: Walter H. Nagy, Ricardo M. Borges, Jeffrey D. Brown, Apurva D. Chaudhari, James W. Cook, Allen W. Hanson, Jerry W. Johnson, Kevin J. Linthicum, Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Sameer Singhal, Robert J. Therrien, Andrei Vescan
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Publication number: 20080182393Abstract: Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the strain-absorbing layer to be very thin, have an amorphous structure and be formed of a silicon nitride-based material. The strain-absorbing layer may reduce the number of misfit dislocations formed in the overlying layer (e.g., a nitride-based material layer) which limits formation of other types of defects in other overlying layers (e.g., gallium nitride material region), amongst other advantages. Thus, the presence of the strain-absorbing layer may improve the quality of the gallium nitride material region which can lead to improved device performance.Type: ApplicationFiled: January 31, 2008Publication date: July 31, 2008Applicant: Nitronex CorporationInventors: Edwin L. Piner, John C. Roberts, Pradeep Rajagopal
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Patent number: 7365374Abstract: Gallium nitride material-based semiconductor structures are provided. In some embodiments, the structures include a composite substrate over which a gallium nitride material region is formed. The gallium nitride material structures may include additional features, such as strain-absorbing layers and/or transition layers, which also promote favorable stress conditions. The reduction in stresses may reduce defect formation and cracking in the gallium nitride material region, as well as reducing warpage of the overall structure. The gallium nitride material-based semiconductor structures may be used in a variety of applications such as transistors (e.g. FETs) Schottky diodes, light emitting diodes, laser diodes, SAW devices, and sensors, amongst others devices.Type: GrantFiled: May 3, 2005Date of Patent: April 29, 2008Assignee: Nitronex CorporationInventors: Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Kevin J. Linthicum
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Patent number: 7339205Abstract: Semiconductor materials including a gallium nitride material region and methods associated with such structures are provided. The semiconductor structures include a strain-absorbing layer formed within the structure. The strain-absorbing layer may be formed between the substrate (e.g., a silicon substrate) and an overlying layer. It may be preferable for the strain-absorbing layer to be very thin, have an amorphous structure and be formed of a silicon nitride-based material. The strain-absorbing layer may reduce the number of misfit dislocations formed in the overlying layer (e.g., a nitride-based material layer) which limits formation of other types of defects in other overlying layers (e.g., gallium nitride material region), amongst other advantages. Thus, the presence of the strain-absorbing layer may improve the quality of the gallium nitride material region which can lead to improved device performance.Type: GrantFiled: June 28, 2004Date of Patent: March 4, 2008Assignee: Nitronex CorporationInventors: Edwin Lanier Piner, John C. Roberts, Pradeep Rajagopal
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Patent number: 7297787Abstract: An improved process for preparing N6 -substituted aminopurine ribofuranose nucleosides. Compounds of this type are known to be usefull in the prepartation of compounds having activitity at adenosine receptors, e.g. Adenosine A1 receptor. The process comprises the step of reacting a 6-halopurine ribofuranose nucleoside with an amine in the presence of CaCO3 , wherein acid is added to the reaction mixture.Type: GrantFiled: March 19, 2002Date of Patent: November 20, 2007Assignee: Glaxo Group LimitedInventors: Malcolm Berry, John C. Roberts, Shiping Xie
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Patent number: 7135720Abstract: Gallium nitride material transistors and methods associated with the same are provided. The transistors may be used in power applications by amplifying an input signal to produce an output signal having increased power. The transistors may be designed to transmit the majority of the output signal within a specific transmission channel (defined in terms of frequency), while minimizing transmission in adjacent channels. This ability gives the transistors excellent linearity which results in high signal quality and limits errors in transmitted data. The transistors may be designed to achieve low ACPR values (a measure of excellent linearity), while still operating at high drain efficiencies and/or high output powers. Such properties enable the transistors to be used in RF power applications including third generation (3G) power applications based on W-CDMA modulation.Type: GrantFiled: August 5, 2004Date of Patent: November 14, 2006Assignee: Nitronex CorporationInventors: Walter H. Nagy, Ricardo M. Borges, Jeffrey D. Brown, Apurva D. Chaudhari, James W. Cook, Jr., Allen W. Hanson, Jerry W. Johnson, Kevin J. Linthicum, Edwin L. Piner, Pradeep Rajagopal, John C. Roberts, Sameer Singhal, Robert J. Therrien, Andrei Vescan
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Patent number: 6632306Abstract: A method of splicing together the ends of two lengths of drip irrigation tape is disclosed in which a tubular insert having an inner layer of high melting point material and an outer layer of bonding material is placed into the end of a first length of drip irrigation tape so that a portion of the insert projects outwardly from the end of the tape. The end of a second length of drip irrigation tape is then placed over the projecting end of the tubular insert so that the two tape ends are butted up against one another or close to one another. Both lengths of tape are then sealed to the outer bonding layer of the insert.Type: GrantFiled: August 7, 2000Date of Patent: October 14, 2003Assignee: Roberts Group Holdings, LLCInventors: John C. Roberts, Jack Butler
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Patent number: 6588680Abstract: An irrigation spray device has a substantially cylindrical peg for insertion into a water supply tube. A longitudinal water supply groove extends along the peg, with a water deflecting plate at one end of the groove for deflecting water traveling downwardly along the groove into an outwardly directed spray. The water deflecting plate has a smooth, convex curved or part-conical shape for forming a smooth, continuous, cone-shaped spray. The supply groove may be U-shaped for improved uniformity.Type: GrantFiled: July 27, 2001Date of Patent: July 8, 2003Assignee: Roberts Group Holdings LLCInventors: Scott G. Cameron, John C. Roberts
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Publication number: 20030019951Abstract: An irrigation spray device has a substantially cylindrical peg for insertion into a water supply tube. A longitudinal water supply groove extends along the peg, with a water deflecting plate at one end of the groove for deflecting water traveling downwardly along the groove into an outwardly directed spray. The water deflecting plate has a smooth, convex curved or part-conical shape for forming a smooth, continuous, cone-shaped spray. The supply groove may be U-shaped for improved uniformity.Type: ApplicationFiled: July 27, 2001Publication date: January 30, 2003Inventors: Scott G. Cameron, John C. Roberts
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Patent number: 6369119Abstract: A cationic rosin-in-water emulsion which has been prepared without intermediate isolation of an anionic rosin-in-water emulsion and in which the dispersed rosin phase is stabilized by a cationic polymer derived from a degraded starch, said polymer having a degree of substitution of at least 0.15 quaternary groups per glucose unit.Type: GrantFiled: April 7, 2000Date of Patent: April 9, 2002Assignee: Rasio Chemcials UK LtdInventors: John C. Roberts, Martin Phillipson
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Patent number: D455055Type: GrantFiled: November 16, 2000Date of Patent: April 2, 2002Assignee: Roberts Groups Holdings, LLCInventors: John C. Roberts, Jack Butler