Abstract: A system and method for improving the prompt dose radiation response of mixed-signal integrated circuits is disclosed. An internal analog circuit inside a mixed-signal integrated circuit generates an internal analog reference voltage that has been used for various purposes in the integrated circuit. At least one external capacitor is added either internal or external to a device package of the integrated circuit. The external capacitor reduces any change in the internal reference voltage due to prompt dose radiation by stabilizing the internal reference voltage and thus improves prompt dose radiation response of mixed-signal integrated circuits. A much greater value of capacitance may be provided without increase in dielectric rupture suceptability or decrease in manufacturing yield which may be associated with added on-chip capacitance. This increased capacitance primarily reduce the amount of disturbance caused to the internal node during a prompt dose radiation event.

Abstract: A system and method for improving the prompt dose radiation response of mixed-signal integrated circuits is disclosed. An internal analog circuit inside a mixed-signal integrated circuit generates an internal analog reference voltage that has been used for various purposes in the integrated circuit. At least one external capacitor is added either internal or external to a device package of the integrated circuit. The external capacitor reduces any change in the internal reference voltage due to prompt dose radiation by stabilizing the internal reference voltage and thus improves prompt dose radiation response of mixed-signal integrated circuits. A much greater value of capacitance may be provided without increase in dielectric rupture suceptability or decrease in manufacturing yield which may be associated with added on-chip capacitance. This increased capacitance primarily reduce the amount of disturbance caused to the internal node during a prompt dose radiation event.

Abstract: A scintillation-based detection device and method for continuous monitoring of flowing liquids for the presence of radionuclides. A side-stream pipe directs a portion of the monitored liquid from the main flow transfer pipe through and/or around the detector. Within the side-stream pipe is a scintillation detector assembly, having) either a nested-cylindrical or stacked-element shape. The real-time to near real-time detection capabilities are influenced by the total surface area of the detector assembly. The detectors are operated in anti-coincidence mode to distinguish pure beta-emitters from beta-gamma emitters and from pure gamma events. A gross beta count, gross gamma count, or some combination may also be determined.

Abstract: A non-volatile single-event upset (SEU) tolerant latch is disclosed. The non-volatile SEU tolerant latch includes a first and second inverters connected to each other in a cross-coupled manner. The gates of transistors within the first inverter are connected to the drains of transistors within the second inverter via a first feedback resistor. Similarly, the gates of transistors within the second inverter are connected to the drains of transistors within the first inverter via a second feedback resistor. The non-volatile SEU tolerant latch also includes a pair of chalcogenide memory elements connected to the inverters for storing information.

Abstract: A non-volatile single-event upset (SEU) tolerant latch is disclosed. The non-volatile SEU tolerant latch includes a first and second inverters connected to each other in a cross-coupled manner. The gates of transistors within the first inverter are connected to the drains of transistors within the second inverter via a first feedback resistor. Similarly, the gates of transistors within the second inverter are connected to the drains of transistors within the first inverter via a second feedback resistor. The non-volatile SEU tolerant latch also includes a pair of chalcogenide memory elements connected to the inverters for storing information.

Abstract: A scintillation-based detection device and method for continuous monitoring of flowing liquids for the presence of radionuclides. A side-stream pipe directs a portion of the monitored liquid from the main flow transfer pipe through and/or around the detector. Within the side-stream pipe is a scintillation detector assembly, having) either a nested-cylindrical or stacked-element shape. The real-time to near real-time detection capabilities are influenced by the total surface area of the detector assembly. The detectors are operated in anti-coincidence mode to distinguish pure beta-emitters from beta-gamma emitters and from pure gamma events. A gross beta count, gross gamma count, or some combination may also be determined.

Abstract: An apparatus and corresponding method for automatically changing out a filter cartridge in a continuous air monitor. The apparatus includes: a first container sized to hold filter cartridge replacements; a second container sized to hold used filter cartridges; a transport insert connectively attached to the first and second containers; a shuttle block, sized to hold the filter cartridges that is located within the transport insert; a transport driver mechanism means used to supply a motive force to move the shuttle block within the transport insert; and, a control means for operating the transport driver mechanism.

Abstract: Chalcogenide technology is used for radiation hardening for spaceborne systems and more particularly in C-RAM form for processors, field programmable gate arrays, startup RAMs, shadow storage and single-chip systems to protect these units.

Abstract: An inlet for an environmental air monitor is described wherein a pre-separator interfaces with ambient environment air and removes debris and insects commonly associated with high wind outdoors and a deflector plate in communication with incoming air from the pre-separator stage, that directs the air radially and downward uniformly into a plurality of accelerator jets located in a manifold of a virtual impactor, the manifold being cylindrical and having a top, a base, and a wall, with the plurality of accelerator jets being located in the top of the manifold and receiving the directed air and accelerating directed air, thereby creating jets of air penetrating into the manifold, where a major flow is deflected to the walls of the manifold and extracted through ports in the walls.

Abstract: A method and system of forming vertical optical interconnects in optical integrated circuits is disclosed. The method includes forming a first optical transmission layer over a substrate. A first cladding layer is then formed on the first optical transmission layer and portions of the first cladding layer removed to form an angled sidewall in the first cladding layer. An optical interconnect layer is formed on the angled sidewall of the first cladding layer and on an exposed portion of the first optical transmission layer.

Abstract: The semiconductor device comprising a chalcogenide phase change material. The chalcogenide material being programmed from one resistance state to another resistance state by applying a programming current to a resistor which is in thermal contact with the chalcogenide material. The semiconductor device may be used as memory element or as a programmable fuse.

Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.

Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.

Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.

Abstract: The semiconductor device comprising a chalcogenide phase change material. The chalcogenide material being programmed from one resistance state to another resistance state by applying a programming current to a resistor which is in thermal contact with the chalcogenide material. The semiconductor device may be used as memory element or as a programmable fuse.

Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.

Abstract: A method for manufacturing sidewall contacts for a chalcogenide memory device is disclosed. A first conductive layer is initially deposited on top of a first oxide layer. The first conductive layer is then patterned and etched using well-known processes. Next, a second oxide layer is deposited on top of the first conductive layer and the first oxide layer. An opening is then etched into at least the first oxide layer such that a portion of the first conductive layer is exposed within the opening. The exposed portion of the first conductive layer is then removed from the opening such that the first conductive layer is flush with an inner surface or sidewall of the opening. After depositing a chalcogenide layer on top of the second oxide layer, filling the opening with chalcogenide, a second conductive layer is deposited on top of the chalcogenide layer.

Abstract: A method for manufacturing a programmable chalcogenide fuse within a semiconductor device is disclosed. A resistor is initially formed on a substrate. Then, a chalcogenide fuse is formed on top of the resistor. Finally, a conductive layer is deposited on top of the chalcogenide fuse for providing electrical conduction to the chalcogenide fuse.

Abstract: A wind deceleration and protective shroud that provides representative samples of ambient aerosols to an environmental continuous air monitor (ECAM) has a cylindrical enclosure mounted to an input on the continuous air monitor, the cylindrical enclosure having shrouded nozzles located radially about its periphery. Ambient air flows, often along with rainwater flows into the nozzles in a sampling flow generated by a pump in the continuous air monitor. The sampling flow of air creates a cyclonic flow in the enclosure that flows up through the cylindrical enclosure until the flow of air reaches the top of the cylindrical enclosure and then is directed downward to the continuous air monitor. A sloped platform located inside the cylindrical enclosure supports the nozzles and causes any moisture entering through the nozzle to drain out through the nozzles.

Abstract: A method for manufacturing a programmable chalcogenide fuse within a semiconductor device is disclosed. A resistor is initially formed on a substrate. Then, a chalcogenide fuse is formed on top of the resistor. Finally, a conductive layer is deposited on top of the chalcogenide fuse for providing electrical conduction to the chalcogenide fuse.