Abstract: An arc flash system includes a circuit breaker having separable contacts, an operating mechanism, a trip unit including a sensor sensing current flowing in a power circuit, a trip circuit cooperating with the operating mechanism to trip open the contacts responsive to the sensed current or a first signal, and a communication interface outputting the sensed current, and an interface circuit including a processor having a first output of the first signal, an input of a second signal, and a second output of a third signal, and a communication interface cooperating with the processor to determine and communicate cause of trip information to the trip unit communication interface, input the sensed current, and communicate the sensed current to the processor. A light sensor senses light from an arc flash associated with the power circuit and outputs the second signal. A shorting apparatus shorts the circuit responsive to the third signal.

Abstract: A circuit breaker includes separable contacts, an operating mechanism to open and close the contacts, and a trip unit cooperating with the operating mechanism to trip open the contacts. The trip unit includes a first component having a processor and a first memory storing a first set of a plurality of trip unit settings, and a second component of the trip unit. The second component is separable from the first component or the trip unit, and includes a second memory storing a second set of a plurality of trip unit settings. The second component saves the first set of the plurality of trip unit settings as the second set of the plurality of trip unit settings in the second memory, and restores the second set of the plurality of trip unit settings in the first memory of the first component or of another first component of another trip unit.

Abstract: A trip unit is for a circuit breaker and includes a plurality of capabilities defining one trip unit style selected from a plurality of different trip unit styles. The trip unit includes a processor including a communication interface having a communication protocol; and a communication adapter module including a first communication interface having the communication protocol, and a second communication interface. The communication adapter module is structured to learn the plurality of capabilities of the trip unit from the processor employing the communication protocol, and to communicate with any of the plurality of different trip unit styles including the one trip unit style.

Abstract: A trip unit is for a circuit breaker and includes a plurality of capabilities defining one trip unit style selected from a plurality of different trip unit styles. The trip unit includes a processor including a communication interface having a communication protocol; and a communication adapter module including a first communication interface having the communication protocol, and a second communication interface. The communication adapter module is structured to learn the plurality of capabilities of the trip unit from the processor employing the communication protocol, and to communicate with any of the plurality of different trip unit styles including the one trip unit style.

Abstract: An arc flash system includes a circuit breaker having separable contacts, an operating mechanism, a trip unit including a sensor sensing current flowing in a power circuit, a trip circuit cooperating with the operating mechanism to trip open the contacts responsive to the sensed current or a first signal, and a communication interface outputting the sensed current, and an interface circuit including a processor having a first output of the first signal, an input of a second signal, and a second output of a third signal, and a communication interface cooperating with the processor to determine and communicate cause of trip information to the trip unit communication interface, input the sensed current, and communicate the sensed current to the processor. A light sensor senses light from an arc flash associated with the power circuit and outputs the second signal. A shorting apparatus shorts the circuit responsive to the third signal.

Abstract: A circuit breaker includes separable contacts, an operating mechanism to open and close the contacts, and a trip unit cooperating with the operating mechanism to trip open the contacts. The trip unit includes a first component having a processor and a first memory storing a first set of a plurality of trip unit settings, and a second component of the trip unit. The second component is separable from the first component or the trip unit, and includes a second memory storing a second set of a plurality of trip unit settings. The second component saves the first set of the plurality of trip unit settings as the second set of the plurality of trip unit settings in the second memory, and restores the second set of the plurality of trip unit settings in the first memory of the first component or of another first component of another trip unit.

Abstract: A sensor node or a control device node is for a home system including a server and a fob. The node includes a household object, and a sensor, control or display device embedded in or substantially within the household object. The sensor, control or display device includes a first wireless port adapted to wirelessly communicate with the server, a second port adapted to communicate with the fob when the fob is proximate to the second port, and a processor operatively associated with the first wireless port and the second port. The processor is adapted to receive proximity information from the second port and responsively communicate with the server through the first wireless port, in order to configure the sensor, control or display device.

Abstract: A translator apparatus includes a first transceiver for a Modbus RTU network having a register map of values, and a second transceiver for an INCOM network of INCOM devices having a plurality of different maps of objects and INCOM commands. A processor includes first and second interfaces to the respective first and second transceivers, and a communication routine adapted to: receive a request based upon the register map through the first transceiver related to the INCOM device objects which are responsive to different INCOM commands, send an INCOM command related to one or more of the INCOM device objects through the second transceiver, receive a response based upon the command through the second transceiver related to the INCOM device objects, and send a response based upon the register map through the first transceiver related to the INCOM device objects.

Abstract: An arc fault/ground fault circuit interrupter for a power circuit includes a line terminal; a load terminal; and separable contacts electrically connected between the line and load terminals. An operating mechanism opens the separable contacts and has a closed position for closing the separable contacts. A trip mechanism cooperates with the operating mechanism to trip open the separable contacts. A ground fault protection circuit is operatively associated with the power circuit. An arc fault protection circuit is also operatively associated with the power circuit. A circuit tests the ground fault protection circuit, tests the arc fault protection circuit, and restores the operating mechanism to the closed position responsive to sequential activation of test and reset buttons.

Abstract: A translator apparatus includes a first transceiver for a Modbus RTU network having a register map of values, and a second transceiver for an INCOM network of INCOM devices having a plurality of different maps of objects and INCOM commands. A processor includes first and second interfaces to the respective first and second transceivers, and a communication routine adapted to: receive a request based upon the register map through the first transceiver related to the INCOM device objects which are responsive to different INCOM commands, send an INCOM command related to one or more of the INCOM device objects through the second transceiver, receive a response based upon the command through the second transceiver related to the INCOM device objects, and send a response based upon the register map through the first transceiver related to the INCOM device objects.

Abstract: A network protector relay for a circuit breaker includes a microcontroller routine which provides a positive sequence network voltage from polyphase network voltages on a network bus. Another microcontroller routine provides a positive sequence phasing voltage from the polyphase network voltages on the network bus and polyphase feeder voltages on a feeder bus. A recloser circuit automatically recloses the circuit breaker connected between the polyphase feeder bus and the polyphase network bus in response to a function of a plurality of setpoints and the positive sequence phasing voltage which indicates a first flow of power from the polyphase feeder bus to the polyphase network bus. A receiver receives a remote close command.

Abstract: A panelboard for power lines and loads includes a housing; a plurality of circuit breakers housed by the housing; and a panelboard controller substantially housed by the housing. Some of the circuit breakers, which switch a circuit from one or more of the power lines to the loads, include remotely controllable actuating circuits for actuating the circuit breakers and switching a circuit from one or more of the power lines to one or more of the loads. The panelboard controller includes a monitoring circuit for monitoring power or energy consumed in the circuits of the circuit breakers and a control circuit for controlling the remotely controllable actuating circuits.

Abstract: Arcing-faults in an electric power distribution system are detected by a circuit which includes a band-pass filter generating a low frequency bandwidth limited arcing current signal having a bandwidth above the measurable harmonics of the ac current but below the frequency band of power line communications systems, about 3 KHz to 20 KHz and preferably about 6 KHz to 12 KHz. For each cycle of the ac current that this low frequency bandwidth limited arcing current exceeds a threshold, preferably related to the amplitude of the ac current, for a selected duration of the cycle, a fixed pulse is generated. If a time attenuated accumulation of these fixed pulses reaches a selected level representative of a number of closely spaced cycles in which the arcing current has been detected for the selected duration, an arc indicative signal is output.

Abstract: A hybrid monolithic IC that is standardized for controlling various types of electrical equipment, such as circuit breakers, motor controllers and the like. The IC is a hybrid monolithic IC, fabricated in CMOS technology. The shortcomings of utilizing CMOS technology for linear or analog circuitry is overcome by the implementation of the IC to provide a hybrid monolithic IC that is relatively less expensive than using multiple IC's or a single IC fabricated from biCMOS technology. Also, by utilizing a single IC, such control and monitoring circuitry can be located in existing electrical equipment. The IC includes an on-board microprocessor, an A/D subsystem and various input/output devices which make it adaptable for use in various types of electrical equipment.

Abstract: A hybrid monolithic IC that is standardized for controlling various types of electrical equipment, such as circuit breakers, motor controllers and the like. The IC is a hybrid monolithic IC, fabricated in CMOS technology. The shortcomings of utilizing CMOS technology for linear or analog circuitry is overcome by the implementation of the IC to provide a hybrid monolithic IC that is relatively less expensive than using multiple IC's or a single IC fabricated from biCMOS technology. Also, by utilizing a single IC, such control and monitoring circuitry can be located in existing electrical equipment. The IC includes an on-board microprocessor, an A/D subsystem and various input/output devices which make it adaptable for use in various types of electrical equipment.

Abstract: A dual mode electronic identification system using a tag which has a RF receiver and transmitter contained therein. In the first mode the tag responds to an interrogation signal by transmitting identification data to the interrogator. In the second mode the tag periodically transmits an identification beacon signal to a directional sensing antenna which uses the signal to compute the position of the tag. The power supply for the tag operates from an internal battery or from power received from a portal signal via a tag receiving antenna. The battery can be automatically turned off when the tag is in the portal area and the unit can be shifted into the battery operated beacon mode when the tag is removed from the portal area.

Abstract: A hybrid monolithic IC that is standardized for controlling various types of electrical equipment, such as circuit breakers, motor controllers and the like. The IC is a hybrid monolithic IC, fabricated in CMOS technology, The shortcomings of utilizing CMOS technology for linear or analog circuitry is overcome by the implementation of the IC to provide a monolithic IC that is relatively less expensive than using multiple ICs or a single IC fabricated from biCMOS technology.

Abstract: An electronic identification tag interrogation method is provided in which a portal transmits an interrogation signal which is received by an electronic identification tag within its field of range. The interrogation signal includes an address which requests a response from every tag having an address greater than or equal to the address of the signal. If more than one reply is received by the portal, the interrogation address is bisected and the interrogation signal is retransmitted. The interrogation address is successively bisected until a single response is isolated. When a single response is isolated, communication is directed between the portal and the identification tag and the interrogation system is reset to isolate and identify any remaining tags.

Abstract: A programmable system for providing a programmable ratio of output pulses to input pulses. The programmable system receives pulses from an electric power meter and outputs a programmable number of pulses representing a number of kilowatt hours consumed. Various electric power meter disk patterns can be processed by the programmable system. The programmable ratio can be applied via input pins and/or via an external memory.

Abstract: A data processing system includes a shared functional unit having access and egress through a plurality of communication channels to several data handling units. The communication channels are multiplexed under control of a priority selection circuit normally arranged as a ladder from highest to lowest priority. Request signals for the various channels are each passed through a respective gate conditioned by a request enable device which is susceptible of being disabled whenever a select signal for that particular channel has been caused to serve the associated handling unit while channels of lower priority have request signals still demanding selection. When the request signal of lowest order at the time has been served, all request enable devices are reset in order to return to full priority selection.