Abstract: A system includes a tubing set and a drive assembly. The tubing set includes inlet tubing couplable to a source of fluid, a valve coupled to the inlet tubing, a syringe coupled to the inlet tubing via the valve, and outlet tubing coupled to the valve. The valve is configured to allow fluid to be drawn from the source of fluid via the inlet tubing into a syringe body of the syringe and to be expelled from the syringe body and through the outlet tubing, and to prevent fluid from being drawn from the outlet tubing into the syringe body and to prevent fluid expelled from the syringe body from flowing through the inlet tubing. The drive assembly is configured to reversibly receive the tubing set such that a drive mechanism is engaged with a plunger of the syringe to reciprocally translate the plunger relative to the syringe body.

Abstract: The invention relates generally to multispecific polypeptides having constrained CD3 binding. In some embodiments, the multispecific polypeptides contain cleavable linkers that, when cleaved, results in dual effector functions. Also provided are methods of making and using these multispecific polypeptides in a variety of therapeutic, diagnostic and prophylactic indications.

Abstract: A light symbol projection device is disclosed. The light symbol projection device has a housing which is temporarily secured within a receiving mechanism. The receiving mechanism is embedded within a product such as, for example, a shoe. The light symbol housing may project, in various colors, a word, pattern, symbol, logo or other indicia on the ground. The light symbol housing may be interchangeable so that the receiving mechanism may receive various light symbol housings having different light projections. In one embodiment, a speaker associated with the device may also provide an audible sound.

Abstract: A light symbol projection device is disclosed. The light symbol projection device has a housing which is temporarily secured within a receiving mechanism. The receiving mechanism is embedded within a product such as, for example, a shoe. The light symbol housing may project, in various colors, a word, pattern, symbol, logo or other indicia on the ground. The light symbol housing may be interchangeable so that the receiving mechanism may receive various light symbol housings having different light projections. In one embodiment, a speaker associated with the device may also provide an audible sound.

Abstract: A solar energy harvesting and storage system is disclosed having a dual-sided lithographically integrated light-to-electrical energy converter. The integrated light-to-electrical energy converter has at least one array of photovoltaic, cells having an array of optoelectronic components, each of which have a compound optical structure that spatially separates light into multiple wavelengths and a P/N junction having a gradient of semiconductor materials and/or dopants responsive to a narrow band of wavelengths. A common electrode connects the optoelectronic components and the common electrode is electrically connected to at least one integrated DC to AC inverter. Also disclosed is a dual-axis solar tracking system upon which the dual-sided lithographically integrated light-to-electrical energy converter is mounted. The dual-axis solar tracking system has two stages of tracking mounts, each tracking mount has a plurality of leaf-springs in a vertical arrangement.

Abstract: An innovative realization of computer hardware, software and firmware comprising a multiprocessor system wherein at least one processor can be configured to have a fixed instruction set and one or more processors can be statically or dynamically configured to implement a plurality of processor states in a plurality of technologies. The processor states may be instructions sets for the processors. The technologies may include programmable logic arrays.

Abstract: An innovative realization of computer hardware, software and firmware comprising a multiprocessor system wherein at least one processor can be configured to have a fixed instruction set and one or more processors can be statically or dynamically configured to implement a plurality of processor states in a plurality of technologies. The processor states may be instructions sets for the processors. The technologies may include programmable logic arrays.

Abstract: An apparatus is disclosed for the optical generation of clock signals with tunable frequency and low jitter. A laser source serves as both the carrier used to transmit the clock signal for use by other optical, electronic or hybrid circuit elements and the original modulation time base. A fraction of the original laser source undergoes one or more stages of frequency division before being recombined as a modulation signal with the remaining laser beam. Transmission of the resulting signal via single mode fiber and dividers retains the low jitter properties of the modulated signal. By starting with a clock signal of optical frequency then dividing downward in frequency, comparatively high frequency clocks may be generated, notably in the GigaHertz and TeraHertz frequency ranges.

Abstract: A solar energy harvesting and storage system is disclosed having a dual-sided lithographically integrated light-to-electrical energy converter. The integrated light-to-electrical energy converter has a dual-sided photovoltaic cell, a compound optical structure and a plurality of integrated DC to AC converters. Also disclosed is a dual-axis solar tracking system upon which the dual-sided lithographically integrated light-to-electrical energy converter is mounted. The dual-axis solar tracking system has two stages of tracking mounts, each tracking mount has a plurality of leaf-springs in a vertical arrangement. The leaf springs have differential coefficients of expansion and contraction so that each tracking mount tracks a solar light source in an orthogonal direction from the other tracking mount.

Abstract: An innovative realization of computer hardware, software and firmware comprising a multiprocessor system wherein at least one processor can be configured to have a fixed instruction set and one or more processors can be statically or dynamically configured to implement a plurality of processor states in a plurality of technologies. The processor states may be instructions sets for the processors. The technologies may include programmable logic arrays.

Abstract: An apparatus is disclosed for the optical generation of clock signals with tunable frequency and low jitter. A laser source serves as both the carrier used to transmit the clock signal for use by other optical, electronic or hybrid circuit elements and the original modulation time base. A fraction of the original laser source undergoes one or more stages of frequency division before being recombined as a modulation signal with the remaining laser beam. Transmission of the resulting signal via single mode fiber and dividers retains the low jitter properties of the modulated signal. By starting with a clock signal of optical frequency then dividing downward in frequency, comparatively high frequency clocks may be generated, notably in the GigaHertz and TeraHertz frequency ranges.

Abstract: A multiprocessor in which processing units have local private caches and records are stored on at least a first global storage control unit. An interconnection system provides node to node data and synchronization communications between processing units and the first global storage control unit. The global storage control unit includes a coherency controller for tracking each instance of records owned by the global storage control unit currently resident on the processing units. Each processing unit executes a cache management process for freeing intervals of the local cache for the processing unit. Upon identification of an interval, the processing unit sends empty notification to the global storage control unit owning the record an instance of which was resident in the interval. Thereafter the interval is marked as invalid in a cache directory for the processing unit and indicia for the instance is deleted from a coherency directory for the global storage control unit.

Abstract: A retry filter and circulating echo apparatus and method are provided for a digital processing system of the type having multiple nodes that communicate via one or more unidirectional rings. The nodes of a digital processing system communicate packets to each other over a unidirectional ring bus. An origination node allocates a sequence identification and transmits a packet to a destination node, which generates a first echo packet and also sets a packet filter indication to drop any further copies of that packet. The first echo packet is sent to the origination node as a confirmation. The origination node generates a second echo packet and sends the generated second echo packet onward to the destination node again as an indication that the packet will not be retransmitted. The destination node transmits a third echo packet as an indication that the sequence can be deallocated.

Abstract: A stale packet removal apparatus and method are provided for a digital processing system of the type having multiple devices that communicate via a plurality of unidirectional rings. Each requesting device sets a traversal count value in a packet and then sends the packet. When the packet is received at an agent, the agent changes the traversal count value and sends the packet onto another of the unidirectional rings. When a device receives the packet, the device identifies the traversal count value and discards the packet responsive to a predefined traversal count value.