Abstract: A multiple output video camera employs a multi-tap memory access system, in which an image input DMA master writes frames of a source image at a maximum frame rate and maximum resolution, via an image bus and a memory controller, into an image memory. In the multi-tap multiple access memory system, a plurality of concurrent independent video output circuits, each possess an image bus input/output master coupled to the image bus; an independent video signal processing circuit; and an output circuit that provides an independently processed version of the sequential video images to a respective output port. The outputs can be digital or analog.