Patents by Inventor John Chilton

John Chilton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7674090
    Abstract: A steam turbine rotor has at least a first stage and a last stage. The rotor is optimised for operation in a wet steam environment at steam temperatures of less than 300° C. by being made more resistant to stress corrosion cracking (SCC). The yield strength of the rotor varies along its axial length such that the yield strength of the rotor in the region of the last turbine stage is more than the yield strength of the rotor in the region of at least one earlier turbine stage.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: March 9, 2010
    Assignee: Alstom Technology Ltd.
    Inventors: Bruce Wynn Roberts, Ian John Chilton
  • Publication number: 20040231123
    Abstract: A remote fastener presenter includes a fastener storage module and feed tube assembly, which deliver a fastener from the fastener storage module to the remote fastener presenter for loading into a fastening tool. The fastening presenter includes a translating module that receives the fastener and orients the fastener between a first orientation and a second orientation that is appropriate for loading into the fastening tool.
    Type: Application
    Filed: May 3, 2004
    Publication date: November 25, 2004
    Inventors: James N. Woyciesjes, Peter Thomas, Brian Taylor, John Chilton Winchester
  • Patent number: 6713722
    Abstract: A method of forming a rotor comprises the step of welding a rotor element. The weld metal comprises: from 0.04 to 0.1% carbon, from 0 to 0.5% silicon, from 0.1 to 0.6% manganese, from 0 to 0.01% sulphur, from 0 to 0.03% phosphorous, from 1.9 to 2.6% chromium, from 0.05 to 0.3% molybdenum, from 0.2 to 0.3% vanadium, from 0.02 to 0.08% niobium, from 1.45 to 2.1% tungsten, from 0 to 0.03% nitrogen, from 0.0005 to 0.006% boron and from 0 to 0.03% aluminium. The rotor element may be formed from steel which comprises from 0.15 to 0.35% carbon, from 0 to 0.3% silicon, from 0.2 to 1% manganese, from 0 to 0.03% sulphur, from 0 to 0.03% phosphorous, from 0.3 to 1% nickel, from 0.7 to 1.50% chromium, from 0.5 to 1.2% molybdenum, and from 0.2 to 0.4% vanadium.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: March 30, 2004
    Assignee: Alstom Technology Ltd
    Inventors: Rodney William Vanstone, Ian John Chilton, Ranjit Ramchandra Ballal, Stuart Leech
  • Publication number: 20030116549
    Abstract: A method of forming a rotor comprises the step of welding a rotor element. The weld metal comprises: from 0.04 to 0.1% carbon, from 0 to 0.5% silicon, from 0.1 to 0.6% manganese, from 0 to 0.01% sulphur, from 0 to 0.03% phosphorous, from 1.9 to 2.6% chromium, from 0.05 to 0.3% molybdenum, from 0.2 to 0.3% vanadium, from 0.02 to 0.08% niobium, from 1.45 to 2.1% tungsten, from 0 to 0.03% nitrogen, from 0.0005 to 0.006% boron and from 0 to 0.03% aluminium. The rotor element may be formed from steel which comprises from 0.15 to 0.35% carbon, from 0 to 0.3% silicon, from 0.2 to 1% manganese, from 0 to 0.03% sulphur, from 0 to 0.03% phosphorous, from 0.3 to 1% nickel, from 0.7 to 1.50% chromium, from 0.5 to 1.2 % molybdenum, and from 0.2 to 0.4% vanadium.
    Type: Application
    Filed: February 11, 2002
    Publication date: June 26, 2003
    Inventors: Rodney William Vanstone, Ian John Chilton, Ranjit Ramchandra Ballal, Stuart Leech
  • Patent number: 5923865
    Abstract: A logic emulation system for emulating the operation of a circuit. A uniform routing architecture is provided where a first set of selectors (multiplexers) is coupled to a set of shift registers that are in turn coupled to a second set of selectors. The outputs of the second set of selectors are coupled to the inputs of the logic processors. The arrangement of first selectors coupled to shift registers coupled to second selectors coupled to logic processors ensures that uniform routing exists among all of the logic processors in the emulation system. This, in turn, provides a flat programming model so that compilation steps including technology mapping and scheduling are independent of each other, resulting in faster compile times.
    Type: Grant
    Filed: June 28, 1995
    Date of Patent: July 13, 1999
    Assignee: Quickturn Design Systems, Inc.
    Inventors: John Chilton, Tony Sarno, Ingo Schaefer
  • Patent number: 5822564
    Abstract: A method and apparatus for outputting a current state of a real-time circuit emulator. When the emulator is set to a predetermined state, it checkpoints the contents of certain memory and registers at the time it enters the predetermined state. The output of the emulator can be used as input to the emulator or as input to another system, such as a simulator, which does not operate in real-time. If the simulator also generates an output having same format, the output of the simulator can also be input to the real-time emulator.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: October 13, 1998
    Assignee: Quickturn Design Systems, Inc.
    Inventors: John Chilton, Tony Sarno, Ingo Schaefer