Abstract: A basic input/output system provides an interface for a core aggregation layout that identifies a grouping of processor cores into core aggregations, wherein each of the core aggregations is associated with a maximum allowable C-state. A processor may monitor an information handling system during operation of an application to gather data associated with latency sensitivity of the application, update the core aggregation layout based on the data gathered during the operation of the application, and pin a thread for execution to one of the processor cores based on the latency sensitivity of the application and the maximum allowable C-state.

Abstract: A basic input/output system provides an interface for a core aggregation layout that identifies a grouping of processor cores into core aggregations, wherein each of the core aggregations is associated with a maximum allowable C-state. A processor may monitor an information handling system during operation of an application to gather data associated with latency sensitivity of the application, update the core aggregation layout based on the data gathered during the operation of the application, and pin a thread for execution to one of the processor cores based on the latency sensitivity of the application and the maximum allowable C-state.

Abstract: A processor/endpoint communication coupling configuration system includes a plurality of processing subsystems coupled to a multi-endpoint adapter device by a plurality of communication couplings included on at least one hardware subsystem. A communication coupling configuration engine identifies each at least one hardware subsystem, determines at least one communication coupling configuration capability of the plurality of communication couplings, and determines at least one first multi-endpoint adapter device capability of the multi-endpoint adapter device.

Abstract: A multi-endpoint adapter device includes a plurality a duplicator device that is coupled to the network port and the plurality of endpoint subsystems that are each configured to couple with a respective processing subsystem. The duplicator device receives, via the network port, a data payload and determines that the data payload is to be provided to each of a first processing subsystem via a first endpoint subsystem that is included in the plurality of endpoint subsystems, and a second processing subsystem via a second endpoint subsystem that is included in the plurality of endpoint subsystems. The duplicator device then duplicates the data payload to provide a first duplicated data payload and a second duplicated data payload. The duplicator device then provides the first duplicated data payload to the first endpoint subsystem and provides the second duplicated data payload to the second endpoint subsystem.

Abstract: A multi-endpoint adapter device includes a plurality a duplicator device that is coupled to the network port and the plurality of endpoint subsystems that are each configured to couple with a respective processing subsystem. The duplicator device receives, via the network port, a data payload and determines that the data payload is to be provided to each of a first processing subsystem via a first endpoint subsystem that is included in the plurality of endpoint subsystems, and a second processing subsystem via a second endpoint subsystem that is included in the plurality of endpoint subsystems. The duplicator device then duplicates the data payload to provide a first duplicated data payload and a second duplicated data payload. The duplicator device then provides the first duplicated data payload to the first endpoint subsystem and provides the second duplicated data payload to the second endpoint subsystem.

Abstract: A processor/endpoint communication coupling configuration system includes a plurality of processing subsystems coupled to a multi-endpoint adapter device by a plurality of communication couplings included on at least one hardware subsystem. A communication coupling configuration engine identifies each at least one hardware subsystem, determines at least one communication coupling configuration capability of the plurality of communication couplings, and determines at least one first multi-endpoint adapter device capability of the multi-endpoint adapter device.

Abstract: A processor/endpoint communication coupling configuration system includes a plurality of processing subsystems coupled to a multi-endpoint adapter device by a plurality of communication couplings included on at least one hardware subsystem. A communication coupling configuration engine identifies each at least one hardware subsystem, determines at least one communication coupling configuration capability of the plurality of communication couplings, and determines at least one first multi-endpoint adapter device capability of the multi-endpoint adapter device.

Abstract: Systems and methods for providing a partitioned interconnect slot for inter-processor operation. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include: a processor comprising a first core and a second core; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to enable an Input/Output (I/O) device to communicate directly with the first core and the second core utilizing a single interconnect slot.

Abstract: Systems and methods for providing a partitioned interconnect slot for inter-processor operation. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include: a processor comprising a first core and a second core; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to enable an Input/Output (I/O) device to communicate directly with the first core and the second core utilizing a single interconnect slot.