Patents by Inventor John Chrysostom Apostol

John Chrysostom Apostol has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • TECHNIQUE FOR CLOCK ALIGNMENT SUPPORTING RESET ISOLATION
    Publication number: 20230280784
    Abstract: An electronic device comprising one or more subcircuits configured to receive a clock signal, the clock signal configured to switch from a reference clock signal to a second clock signal based on a clock bypass signal, a timer configured to receive the reference clock signal and output an alignment signal based on the reference clock signal, wherein a frequency of the alignment signal is determined based on clock frequencies of the one or more subcircuits; a clock alignment module coupled to the timer and the one or more subcircuits and configured to receive the clock bypass signal, determine that the clock bypass signal has changed to switch the one or more subcircuits to the reference clock signal from the second clock signal, block the clock signal from being received by the one or more subcircuits, receive the alignment signal, and unblock the clock signal based on the alignment signal.
    Type: Application
    Filed: May 15, 2023
    Publication date: September 7, 2023
    Inventors: Varun SINGH, Rejitha NAIR, John Chrysostom APOSTOL, Venkateswar Reddy KOWKUTLA, Santhanagopal RAGHAVENDRA
  • TECHNIQUE FOR CLOCK ALIGNMENT SUPPORTING RESET ISOLATION
    Publication number: 20230168709
    Abstract: An electronic device comprising one or more subcircuits configured to receive a clock signal, the clock signal configured to switch from a reference clock signal to a second clock signal based on a clock bypass signal, a timer configured to receive the reference clock signal and output an alignment signal based on the reference clock signal, wherein a frequency of the alignment signal is determined based on clock frequencies of the one or more subcircuits; a clock alignment module coupled to the timer and the one or more subcircuits and configured to receive the clock bypass signal, determine that the clock bypass signal has changed to switch the one or more subcircuits to the reference clock signal from the second clock signal, block the clock signal from being received by the one or more subcircuits, receive the alignment signal, and unblock the clock signal based on the alignment signal.
    Type: Application
    Filed: November 29, 2021
    Publication date: June 1, 2023
    Inventors: Varun SINGH, Rejitha NAIR, John Chrysostom APOSTOL, Venkateswar Reddy KOWKUTLA, Raghavendra SANTHANAGOPAL
  • Technique for clock alignment supporting reset isolation
    Patent number: 11662763
    Abstract: An electronic device comprising one or more subcircuits configured to receive a clock signal, the clock signal configured to switch from a reference clock signal to a second clock signal based on a clock bypass signal, a timer configured to receive the reference clock signal and output an alignment signal based on the reference clock signal, wherein a frequency of the alignment signal is determined based on clock frequencies of the one or more subcircuits; a clock alignment module coupled to the timer and the one or more subcircuits and configured to receive the clock bypass signal, determine that the clock bypass signal has changed to switch the one or more subcircuits to the reference clock signal from the second clock signal, block the clock signal from being received by the one or more subcircuits, receive the alignment signal, and unblock the clock signal based on the alignment signal.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: May 30, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Varun Singh, Rejitha Nair, John Chrysostom Apostol, Venkateswar Reddy Kowkutla, Raghavendra Santhanagopal