Patents by Inventor John Commander
John Commander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240018678Abstract: An electrolytic plating composition for superfilling submicron features in a semiconductor integrated circuit device and a method of using the same. The composition comprises (a) a source of copper ions to electrolytically deposit copper onto the substrate and into the electrical interconnect features, and (b) a suppressor comprising at least three amine sites, said polyether comprising a block copolymer substituent comprising propylene oxide (PO) repeat units and ethylene oxide (EO) repeat units, wherein the number average molecular weight of the suppressor compound is between about 1,000 and about 20,000.Type: ApplicationFiled: September 25, 2023Publication date: January 18, 2024Inventors: Vincent Paneccasio, JR., Kyle Whitten, Richard Hurtubise, John Commander, Eric Rouya
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Patent number: 11697884Abstract: An electrodeposition composition comprising: (a) a source of copper ions; (b) an acid; (c) a suppressor; and (d) a leveler, wherein the leveler comprises a quaternized dipyridyl compound prepared by reacting a dipyridyl compound with a difunctional alkylating agent or a quaternized poly(epihalohydrin). The electrodeposition composition can be used in a process for forming a copper feature over a semiconductor substrate in wafer level packaging to electrodeposit a copper bump or pillar on an underbump structure of a semiconductor assembly.Type: GrantFiled: August 12, 2021Date of Patent: July 11, 2023Assignee: MacDermid Enthone Inc.Inventors: Thomas Richardson, Kyle Whitten, Vincent Paneccasio, Jr., John Commander, Richard Hurtubise
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Patent number: 11434578Abstract: Processes and compositions for electroplating a cobalt deposit onto a semiconductor base structure comprising sub-micron-sized electrical interconnect features. In the process, a metalizing substrate within the interconnect features is contacted with an electrodeposition composition comprising a source of cobalt ions, an accelerator comprising an organic sulfur compound, an acetylenic suppressor, a buffering agent and water. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The process is effective for superfilling the interconnect features.Type: GrantFiled: April 1, 2021Date of Patent: September 6, 2022Assignee: MacDermid Enthone Inc.Inventors: John Commander, Vincent Paneccasio, Jr., Eric Rouya, Kyle Whitten, Shaopeng Sun, Jianwen Han
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Patent number: 11401618Abstract: Compositions and methods of using such compositions for electroplating cobalt onto semiconductor base structures comprising submicron-sized electrical interconnect features are provided herein. The interconnect features are metallized by contacting the semiconductor base structure with an electrolytic composition comprising a source of cobalt ions, a suppressor, a buffer, and one or more of a depolarizing compound and a uniformity enhancer. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The method presented herein is useful for superfilling interconnect features.Type: GrantFiled: April 5, 2021Date of Patent: August 2, 2022Assignee: MacDermid Enthone Inc.Inventors: John Commander, Kyle Whitten, Vincent Paneccasio, Jr., Shaopeng Sun, Eric Yakobson, Jianwen Han, Elie Najjar
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Publication number: 20210388519Abstract: An electrodeposition composition comprising: (a) a source of copper ions; (b) an acid; (c) a suppressor; and (d) a leveler, wherein the leveler comprises a quaternized dipyridyl compound prepared by reacting a dipyridyl compound with a difunctional alkylating agent or a quaternized poly(epihalohydrin). The electrodeposition composition can be used in a process for forming a copper feature over a semiconductor substrate in wafer level packaging to electrodeposit a copper bump or pillar on an underbump structure of a semiconductor assembly.Type: ApplicationFiled: August 12, 2021Publication date: December 16, 2021Inventors: Thomas Richardson, Kyle Whitten, Vincent Paneccasio, JR., John Commander, Richard Hurtubise
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Publication number: 20210332491Abstract: Compositions and methods of using such compositions for electroplating cobalt onto semiconductor base structures comprising submicron-sized electrical interconnect features are provided herein. The interconnect features are metallized by contacting the semiconductor base structure with an electrolytic composition comprising a source of cobalt ions, a suppressor, a buffer, and one or more of a depolarizing compound and a uniformity enhancer. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The method presented herein is useful for superfilling interconnect features.Type: ApplicationFiled: April 5, 2021Publication date: October 28, 2021Inventors: John Commander, Kyle Whitten, Vincent Paneccasio, JR., Shaopeng Sun, Eric Yakobson, Jianwen Han, Elie Najjar
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Patent number: 11124888Abstract: An electrodeposition composition comprising: (a) a source of copper ions; (b) an acid; (c) a suppressor, and (d) a leveler, wherein the leveler comprises a quaternized dipyridyl compound prepared by reacting a dipyridyl compound with a difunctional alkylating agent or a quaternized poly(epihalohydrin). The electrodeposition composition can be used in a process for forming a copper feature over a semiconductor substrate in wafer level packaging to electrodeposit a copper bump or pillar on an underbump structure of a semiconductor assembly.Type: GrantFiled: September 20, 2017Date of Patent: September 21, 2021Assignee: MacDermid Enthone Inc.Inventors: Thomas Richardson, Kyle Whitten, Vincent Paneccasio, Jr., John Commander, Richard Hurtubise
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Publication number: 20210222314Abstract: Processes and compositions for electroplating a cobalt deposit onto a semiconductor base structure comprising sub-micron-sized electrical interconnect features. In the process, a metalizing substrate within the interconnect features is contacted with an electrodeposition composition comprising a source of cobalt ions, an accelerator comprising an organic sulfur compound, an acetylenic suppressor, a buffering agent and water. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The process is effective for superfilling the interconnect features.Type: ApplicationFiled: April 1, 2021Publication date: July 22, 2021Inventors: John Commander, Vincent Paneccasio, JR., Eric Rouya, Kyle Whitten, Shaopeng Sun, Jianwen Han
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Patent number: 11035048Abstract: Compositions and methods of using such compositions for electroplating cobalt onto semiconductor base structures comprising submicron-sized electrical interconnect features are provided herein. The interconnect features are metallized by contacting the semiconductor base structure with an electrolytic composition comprising a source of cobalt ions, a suppressor, a buffer, and one or more of a depolarizing compound and a uniformity enhancer. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The method presented herein is useful for superfilling interconnect features.Type: GrantFiled: July 5, 2017Date of Patent: June 15, 2021Assignee: MacDermid Enthone Inc.Inventors: John Commander, Kyle Whitten, Vincent Paneccasio, Jr., Shaopeng Sun, Eric Yakobson, Jianwen Han, Elie Najjar
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Patent number: 10995417Abstract: Processes and compositions for electroplating a cobalt deposit onto a semiconductor base structure comprising submicron-sized electrical interconnect features. In the process, a metalizing substrate within the interconnect features is contacted with an electrodeposition composition comprising a source of cobalt ions, an accelerator comprising an organic sulfur compound, an acetylenic suppressor, a buffering agent and water. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The process is effective for superfilling the interconnect features.Type: GrantFiled: June 30, 2016Date of Patent: May 4, 2021Assignee: MacDermid Enthone Inc.Inventors: John Commander, Vincent Paneccasio, Jr., Eric Rouya, Kyle Whitten, Shaopeng Sun, Jianwen Han
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Publication number: 20200040478Abstract: Processes and compositions for electroplating a cobalt deposit onto a semiconductor base structure comprising submicron-sized electrical interconnect features. In the process, a metalizing substrate within the interconnect features is contacted with an electrodeposition composition comprising a source of cobalt ions, an accelerator comprising an organic sulfur compound, an acetylenic suppressor, a buffering agent and water. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The process is effective for superfilling the interconnect features.Type: ApplicationFiled: June 30, 2016Publication date: February 6, 2020Inventors: John Commander, Vincent Paneccasio, Jr., Eric Rouya, Kyle Whitten, Shaopeng Sun
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Publication number: 20190390356Abstract: An electrolytic plating composition for superfilling submicron features in a semiconductor integrated circuit device and a method of using the same. The composition comprises (a) a source of copper ions to electrolytically deposit copper onto the substrate and into the electrical interconnect features, and (b) a suppressor comprising at least three amine sites, said polyether comprising a block copolymer substituent comprising propylene oxide (PO) repeat units and ethylene oxide (EO) repeat units, wherein the number average molecular weight of the suppressor compound is between about 1,000 and about 20,000.Type: ApplicationFiled: September 21, 2017Publication date: December 26, 2019Inventors: Vincent Paneccasio, Jr., Kyle Whitten, Richard Hurtubise, John Commander, Eric Rouya
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Publication number: 20190368064Abstract: An electrodeposition composition comprising: (a) a source of copper ions; (b) an acid; (c) a suppressor, and (d) a leveler, wherein the leveler comprises a quaternized dipyridyl compound prepared by reacting a dipyridyl compound with a difunctional alkylating agent or a quaternized poly(epihalohydrin). The electrodeposition composition can be used in a process for forming a copper feature over a semiconductor substrate in wafer level packaging to electrodeposit a copper bump or pillar on an underbump structure of a semiconductor assembly.Type: ApplicationFiled: September 20, 2017Publication date: December 5, 2019Inventors: Thomas Richardson, Kyle Whitten, Vincent Paneccasio, Jr., John Commander, Richard Hurtubise
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Publication number: 20190010624Abstract: Compositions and methods of using such compositions for electroplating cobalt onto semiconductor base structures comprising submicron-sized electrical interconnect features are provided herein. The interconnect features are metallized by contacting the semiconductor base structure with an electrolytic composition comprising a source of cobalt ions, a suppressor, a buffer, and one or more of a depolarizing compound and a uniformity enhancer. Electrical current is supplied to the electrolytic composition to deposit cobalt onto the base structure and fill the submicron-sized features with cobalt. The method presented herein is useful for superfilling interconnect features.Type: ApplicationFiled: July 5, 2017Publication date: January 10, 2019Inventors: John Commander, Kyle Whitten, Vincent Paneccasio, JR., Shaopeng Sun, Eric Yakobson
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Publication number: 20180355502Abstract: Features such as bumps, pillars and/or vias can be plated best using current with either a square wave or square wave with open circuit wave form. Using the square wave or square wave with open circuit wave forms of plating current, produces features such as bumps, pillars, and vias with optimum shape and filling characteristics. Specifically, vias are filled uniformly and completely, and pillars are formed without rounded tops, bullet shape, or waist curves. In the process, the metalizing substrate is contacted with an electrolytic copper deposition composition. The deposition composition comprises a source of copper ions, an acid component selected from among an inorganic acid, an organic sulfonic acid, and mixtures thereof, an accelerator, a suppressor, a leveler, and chloride ions.Type: ApplicationFiled: June 8, 2017Publication date: December 13, 2018Inventors: Elie Najjar, John Commander, Thomas Richardson, Tao Chi Liu, Jiang Chiang
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Publication number: 20160281251Abstract: In electrolytic copper plating, an aqueous composition comprising a source of copper ions and at least one alkylene or polyalkylene glycol monoether which is soluble in the aqueous phase and has molecular weight not greater than about 500 for improving the efficacy of other additives such as, for example, levelers and suppressors; and a related plating method.Type: ApplicationFiled: November 25, 2014Publication date: September 29, 2016Inventors: Vincent Paneccasio, Kyle Whitten, John Commander, Richard Hurtubise, Eric Rouya
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Patent number: 9222188Abstract: A method for electroplating a copper deposit onto a semiconductor integrated circuit device substrate having submicron-sized features, and a concentrate for forming a corresponding electroplating bath. A substrate is immersed into an electroplating bath formed from the concentrate including ionic copper and an effective amount of a defect reducing agent, and electroplating the copper deposit from the bath onto the substrate to fill the submicron-sized reliefs. The occurrence of protrusion defects from superfilling, surface roughness, and voiding due to uneven growth are reduced, and macro-scale planarity across the wafer is improved.Type: GrantFiled: January 8, 2008Date of Patent: December 29, 2015Assignee: Enthone Inc.Inventors: John Commander, Richard Hurtubise, Vincent Paneccasio, Xuan Lin, Kshama Jirage
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Publication number: 20080121527Abstract: A method for electroplating a copper deposit onto a semiconductor integrated circuit device substrate having submicron-sized features, and a concentrate for forming a corresponding electroplating bath. A substrate is immersed into an electroplating bath formed from the concentrate including ionic copper and an effective amount of a defect reducing agent, and electroplating the copper deposit from the bath onto the substrate to fill the submicron-sized reliefs. The occurrence of protrusion defects from superfilling, surface roughness, and voiding due to uneven growth are reduced, and macro-scale planarity across the wafer is improved.Type: ApplicationFiled: January 8, 2008Publication date: May 29, 2008Applicant: ENTHONE INC.Inventors: John Commander, Richard Hurtubise, Vincent Paneccasio, Xuan Lin, Kshama Jirage
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Patent number: 7316772Abstract: A method for electroplating a copper deposit onto a semiconductor integrated circuit device substrate having submicron-sized features, and a concentrate for forming a corresponding electroplating bath. A substrate is immersed into an electroplating bath formed from the concentrate including ionic copper and an effective amount of a defect reducing agent, and electroplating the copper deposit from the bath onto the substrate to fill the submicron-sized reliefs. The occurrence of protrusion defects from superfilling, surface roughness, and voiding due to uneven growth are reduced, and macro-scale planarity across the wafer is improved.Type: GrantFiled: March 5, 2002Date of Patent: January 8, 2008Assignee: Enthone Inc.Inventors: John Commander, Richard Hurtubise, Vincent Paneccasio, Xuan Lin, Kshama Jirage
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Publication number: 20030168343Abstract: A method for electroplating a copper deposit onto a semiconductor integrated circuit device substrate having submicron-sized features, and a concentrate for forming a corresponding electroplating bath. A substrate is immersed into an electroplating bath formed from the concentrate including ionic copper and an effective amount of a defect reducing agent, and electroplating the copper deposit from the bath onto the substrate to fill the submicron-sized reliefs. The occurrence of protrusion defects from superfilling, surface roughness, and voiding due to uneven growth are reduced, and macro-scale planarity across the wafer is improved.Type: ApplicationFiled: March 5, 2002Publication date: September 11, 2003Inventors: John Commander, Richard Hurtubise, Vincent Paneccasio, Xuan Lin, Kshama Jirage