Abstract: A gate driver to control a high-power switching device is disclosed. The gate driver includes a multifunction pin that allows the gate driver to be controlled by a multifunction signal to perform a number of different functions. For example, a level of the multifunction signal at the multifunction pin can enable/disable the output of the gate driver. In another example, a level of the multifunction signal that is held for a period while the gate driver is in a fault state can reset the state of the gate driver. In another example, pulsing the multifunction signal a number of times can activate a test of the fault detection capabilities of the gate driver. Utilizing one pin for this control, simplifies circuit complexity for communication between a controller and the gate driver, thereby reducing cost and increasing reliability.

Abstract: A gate driver to control a high-power switching device is disclosed. The gate driver includes a multifunction pin that allows the gate driver to be controlled by a multifunction signal to perform a number of different functions. For example, a level of the multifunction signal at the multifunction pin can enable/disable the output of the gate driver. In another example, a level of the multifunction signal that is held for a period while the gate driver is in a fault state can reset the state of the gate driver. In another example, pulsing the multifunction signal a number of times can activate a test of the fault detection capabilities of the gate driver. Utilizing one pin for this control, simplifies circuit complexity for communication between a controller and the gate driver, thereby reducing cost and increasing reliability.

Abstract: In a general aspect, a data communication circuit can include a differential transmitter configured to be coupled with a differential input of a first unidirectional differential isolation channel, and a differential receiver configured to be coupled with a differential output of a second unidirectional differential isolation channel. The differential receiver can include a comparator that has a threshold that is adjustable based on a signal received via the second unidirectional differential isolation channel.

Abstract: In a general aspect, a data communication circuit can include a differential transmitter configured to be coupled with a differential input of a first unidirectional differential isolation channel, and a differential receiver configured to be coupled with a differential output of a second unidirectional differential isolation channel. The differential receiver can include a comparator that has a threshold that is adjustable based on a signal received via the second unidirectional differential isolation channel.

Abstract: In a general aspect, a data communication circuit can include a transmitter configured to transmit a first digital bit stream via a first unidirectional isolation channel. The data communication circuit can further include a receiver configured to receive a second digital bit stream via a second unidirectional isolation channel. The first unidirectional isolation channel and the second unidirectional isolation channel can be defined on a common dielectric substrate. The data communication circuit can further include a crosstalk suppression circuit configured to provide at least one negative feedback signal to suppress crosstalk between the transmitter and the receiver due to parasitic capacitive coupling between the first unidirectional isolation channel and the second unidirectional isolation channel in the common dielectric substrate.

Abstract: In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.

Abstract: In a general aspect, a data communication circuit can include a transmitter configured to transmit a first digital bit stream via a first unidirectional isolation channel. The data communication circuit can further include a receiver configured to receive a second digital bit stream via a second unidirectional isolation channel. The first unidirectional isolation channel and the second unidirectional isolation channel can be defined on a common dielectric substrate. The data communication circuit can further include a crosstalk suppression circuit configured to provide at least one negative feedback signal to suppress crosstalk between the transmitter and the receiver due to parasitic capacitive coupling between the first unidirectional isolation channel and the second unidirectional isolation channel in the common dielectric substrate.

Abstract: In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.

Abstract: In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.

Abstract: In some general aspects, an apparatus may include a first semiconductor die, a second semiconductor die, and a capacitive isolation circuit being coupled to the first semiconductor die and the second semiconductor die. The capacitive isolation circuit may be disposed outside of the first semiconductor die and the second semiconductor die. The first semiconductor die, the second semiconductor die, and the capacitive circuit may be included in a molding of a semiconductor package.